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HEAD
New RV64C proposal
[riscv-isa-sim.git]
/
riscv
/
insns
/
c_and3.h
1
require_extension
(
'C'
);
2
WRITE_RVC_RDS
(
RVC_RS1S
&
RVC_RS2S
);
projects / riscv-isa-sim.git / blob