Implement timer faithfully
[riscv-isa-sim.git] / riscv / insns / csrrs.h
1 int csr = validate_csr(insn.csr(), insn.rs1() != 0);
2 reg_t old = p->get_pcr(csr);
3 p->set_pcr(csr, old | RS1);
4 WRITE_RD(sext_xprlen(old));