Support RV32 RDTIMEH/RDCYCLEH/RDINSTRETH
[riscv-isa-sim.git] / riscv / insns / csrrsi.h
1 int csr = validate_csr(insn.csr(), true);
2 WRITE_RD(sext_xprlen(p->set_pcr(csr, p->get_pcr(csr) | insn.rs1())));