[xcc] minor performance tweaks
[riscv-isa-sim.git] / riscv / insns / fcvt_l_d.h
1 require_xpr64;
2 require_fp;
3 softfloat_roundingMode = RM;
4 RD = f64_to_i64(FRS1, RM, true);
5 set_fp_exceptions;