riscv/insns/mtpcr.h

   1 require_supervisor;
   2
   3 switch(insn.rtype.rs2)
   4 {
   5   case 0:
   6     set_sr(RS1);
   7     break;
   8   case 1:
   9     epc = RS1;
  10     break;
  11   case 3:
  12     evec = RS1;
  13     break;
  14   case 4:
  15     count = RS1;
  16     break;
  17   case 5:
  18     cause &= ~(1 << (TIMER_IRQ+CAUSE_IP_SHIFT));
  19     compare = RS1;
  20     break;
  21
  22   case 7:
  23     sim.send_ipi(RS1);
  24     break;
  25
  26   case 9:
  27     mmu.set_ptbr(RS1);
  28     break;
  29
  30   case 11:
  31     vecbanks = RS1 & 0xff;
  32     vecbanks_count = __builtin_popcountll(vecbanks);
  33     break;
  34
  35   case 16:
  36     sim.set_tohost(RS1);
  37     break;
  38
  39   case 24:
  40     pcr_k0 = RS1;
  41     break;
  42   case 25:
  43     pcr_k1 = RS1;
  44     break;
  45 }