Support setting ISA/subsets with --isa flag

[riscv-isa-sim.git] / riscv / insns / sc_w.h

require_extension('A');
if (RS1 == p->get_state()->load_reservation)
{
  MMU.store_uint32(RS1, RS2);
  WRITE_RD(0);
}
else
  WRITE_RD(1);