Exit cleanly from debug console
[riscv-isa-sim.git] / riscv / interactive.cc
1 // See LICENSE for license details.
2
3 #include "sim.h"
4 #include "htif.h"
5 #include <sys/mman.h>
6 #include <map>
7 #include <iostream>
8 #include <climits>
9 #include <cinttypes>
10 #include <assert.h>
11 #include <stdlib.h>
12 #include <unistd.h>
13 #include <sstream>
14 #include <string>
15 #include <vector>
16
17 static std::string readline()
18 {
19 std::string s;
20 while (1)
21 {
22 char ch;
23 assert(read(1, &ch, 1) == 1);
24
25 if (ch == '\x7f')
26 {
27 if (s.empty())
28 continue;
29 s.erase(s.end()-1);
30 }
31
32 assert(write(1, &ch, 1) == 1);
33 if (ch == '\n')
34 return s;
35 if (ch != '\x7f')
36 s += ch;
37 }
38 }
39
40 void sim_t::interactive()
41 {
42 std::cout << ": " << std::flush;
43 std::string s = readline();
44
45 std::stringstream ss(s);
46 std::string cmd, tmp;
47 std::vector<std::string> args;
48 if (!(ss >> cmd))
49 {
50 interactive_run_noisy(std::string("r"), std::vector<std::string>(1,"1"));
51 return;
52 }
53 while (ss >> tmp)
54 args.push_back(tmp);
55
56 typedef void (sim_t::*interactive_func)(const std::string&, const std::vector<std::string>&);
57 std::map<std::string,interactive_func> funcs;
58
59 funcs["r"] = &sim_t::interactive_run_noisy;
60 funcs["rs"] = &sim_t::interactive_run_silent;
61 funcs["reg"] = &sim_t::interactive_reg;
62 funcs["fregs"] = &sim_t::interactive_fregs;
63 funcs["fregd"] = &sim_t::interactive_fregd;
64 funcs["mem"] = &sim_t::interactive_mem;
65 funcs["str"] = &sim_t::interactive_str;
66 funcs["until"] = &sim_t::interactive_until;
67 funcs["while"] = &sim_t::interactive_until;
68 funcs["q"] = &sim_t::interactive_quit;
69
70 try
71 {
72 if(funcs.count(cmd))
73 (this->*funcs[cmd])(cmd, args);
74 }
75 catch(trap_t t) {}
76 }
77
78 void sim_t::interactive_run_noisy(const std::string& cmd, const std::vector<std::string>& args)
79 {
80 interactive_run(cmd,args,true);
81 }
82
83 void sim_t::interactive_run_silent(const std::string& cmd, const std::vector<std::string>& args)
84 {
85 interactive_run(cmd,args,false);
86 }
87
88 void sim_t::interactive_run(const std::string& cmd, const std::vector<std::string>& args, bool noisy)
89 {
90 size_t steps = args.size() ? atoll(args[0].c_str()) : -1;
91 step(steps, noisy);
92 }
93
94 void sim_t::interactive_quit(const std::string& cmd, const std::vector<std::string>& args)
95 {
96 stop();
97 }
98
99 reg_t sim_t::get_pc(const std::vector<std::string>& args)
100 {
101 if(args.size() != 1)
102 throw trap_illegal_instruction;
103
104 int p = atoi(args[0].c_str());
105 if(p >= (int)num_cores())
106 throw trap_illegal_instruction;
107
108 return procs[p]->pc;
109 }
110
111 reg_t sim_t::get_reg(const std::vector<std::string>& args)
112 {
113 if(args.size() != 2)
114 throw trap_illegal_instruction;
115
116 int p = atoi(args[0].c_str());
117 int r = atoi(args[1].c_str());
118 if(p >= (int)num_cores() || r >= NXPR)
119 throw trap_illegal_instruction;
120
121 return procs[p]->XPR[r];
122 }
123
124 reg_t sim_t::get_freg(const std::vector<std::string>& args)
125 {
126 if(args.size() != 2)
127 throw trap_illegal_instruction;
128
129 int p = atoi(args[0].c_str());
130 int r = atoi(args[1].c_str());
131 if(p >= (int)num_cores() || r >= NFPR)
132 throw trap_illegal_instruction;
133
134 return procs[p]->FPR[r];
135 }
136
137 void sim_t::interactive_reg(const std::string& cmd, const std::vector<std::string>& args)
138 {
139 printf("0x%016" PRIx64 "\n", get_reg(args));
140 }
141
142 union fpr
143 {
144 reg_t r;
145 float s;
146 double d;
147 };
148
149 void sim_t::interactive_fregs(const std::string& cmd, const std::vector<std::string>& args)
150 {
151 fpr f;
152 f.r = get_freg(args);
153 printf("%g\n",f.s);
154 }
155
156 void sim_t::interactive_fregd(const std::string& cmd, const std::vector<std::string>& args)
157 {
158 fpr f;
159 f.r = get_freg(args);
160 printf("%g\n",f.d);
161 }
162
163 reg_t sim_t::get_mem(const std::vector<std::string>& args)
164 {
165 if(args.size() != 1 && args.size() != 2)
166 throw trap_illegal_instruction;
167
168 std::string addr_str = args[0];
169 if(args.size() == 2)
170 {
171 int p = atoi(args[0].c_str());
172 if(p >= (int)num_cores())
173 throw trap_illegal_instruction;
174 mmu->set_sr(procs[p]->sr);
175 mmu->set_ptbr(procs[p]->mmu.get_ptbr());
176 addr_str = args[1];
177 }
178
179 reg_t addr = strtol(addr_str.c_str(),NULL,16), val;
180 if(addr == LONG_MAX)
181 addr = strtoul(addr_str.c_str(),NULL,16);
182
183 switch(addr % 8)
184 {
185 case 0:
186 val = mmu->load_uint64(addr);
187 break;
188 case 4:
189 val = mmu->load_uint32(addr);
190 break;
191 case 2:
192 case 6:
193 val = mmu->load_uint16(addr);
194 break;
195 default:
196 val = mmu->load_uint8(addr);
197 break;
198 }
199 return val;
200 }
201
202 void sim_t::interactive_mem(const std::string& cmd, const std::vector<std::string>& args)
203 {
204 printf("0x%016" PRIx64 "\n", get_mem(args));
205 }
206
207 void sim_t::interactive_str(const std::string& cmd, const std::vector<std::string>& args)
208 {
209 if(args.size() != 1)
210 throw trap_illegal_instruction;
211
212 reg_t addr = strtol(args[0].c_str(),NULL,16);
213
214 char ch;
215 while((ch = mmu->load_uint8(addr++)))
216 putchar(ch);
217
218 putchar('\n');
219 }
220
221 void sim_t::interactive_until(const std::string& cmd, const std::vector<std::string>& args)
222 {
223 if(args.size() < 3)
224 return;
225
226 std::string scmd = args[0];
227 reg_t val = strtol(args[args.size()-1].c_str(),NULL,16);
228 if(val == LONG_MAX)
229 val = strtoul(args[args.size()-1].c_str(),NULL,16);
230
231 std::vector<std::string> args2;
232 args2 = std::vector<std::string>(args.begin()+1,args.end()-1);
233
234 while (1)
235 {
236 reg_t current;
237 if(scmd == "reg")
238 current = get_reg(args2);
239 else if(scmd == "pc")
240 current = get_pc(args2);
241 else if(scmd == "mem")
242 current = get_mem(args2);
243 else
244 return;
245
246 if(cmd == "until" && current == val)
247 break;
248 if(cmd == "while" && current != val)
249 break;
250
251 step(1, false);
252 }
253 }