riscv/interactive.cc

   1 // See LICENSE for license details.
   2
   3 #include "decode.h"
   4 #include "disasm.h"
   5 #include "sim.h"
   6 #include "htif.h"
   7 #include <sys/mman.h>
   8 #include <termios.h>
   9 #include <map>
  10 #include <iostream>
  11 #include <climits>
  12 #include <cinttypes>
  13 #include <assert.h>
  14 #include <stdlib.h>
  15 #include <unistd.h>
  16 #include <sstream>
  17 #include <string>
  18 #include <vector>
  19 #include <algorithm>
  20
  21 static std::string readline(int fd)
  22 {
  23   struct termios tios;
  24   bool noncanonical = tcgetattr(fd, &tios) == 0 && (tios.c_lflag & ICANON) == 0;
  25
  26   std::string s;
  27   for (char ch; read(fd, &ch, 1) == 1; )
  28   {
  29     if (ch == '\x7f')
  30     {
  31       if (s.empty())
  32         continue;
  33       s.erase(s.end()-1);
  34
  35       if (noncanonical && write(fd, "\b \b", 3) != 3)
  36         ; // shut up gcc
  37     }
  38     else if (noncanonical && write(fd, &ch, 1) != 1)
  39       ; // shut up gcc
  40
  41     if (ch == '\n')
  42       break;
  43     if (ch != '\x7f')
  44       s += ch;
  45   }
  46   return s;
  47 }
  48
  49 void sim_t::interactive()
  50 {
  51   while (!htif->done())
  52   {
  53     std::cerr << ": " << std::flush;
  54     std::string s = readline(2);
  55
  56     std::stringstream ss(s);
  57     std::string cmd, tmp;
  58     std::vector<std::string> args;
  59
  60     if (!(ss >> cmd))
  61     {
  62       set_procs_debug(true);
  63       step(1);
  64       continue;
  65     }
  66
  67     while (ss >> tmp)
  68       args.push_back(tmp);
  69
  70     typedef void (sim_t::*interactive_func)(const std::string&, const std::vector<std::string>&);
  71     std::map<std::string,interactive_func> funcs;
  72
  73     funcs["r"] = &sim_t::interactive_run_noisy;
  74     funcs["rs"] = &sim_t::interactive_run_silent;
  75     funcs["reg"] = &sim_t::interactive_reg;
  76     funcs["fregs"] = &sim_t::interactive_fregs;
  77     funcs["fregd"] = &sim_t::interactive_fregd;
  78     funcs["mem"] = &sim_t::interactive_mem;
  79     funcs["str"] = &sim_t::interactive_str;
  80     funcs["until"] = &sim_t::interactive_until;
  81     funcs["while"] = &sim_t::interactive_until;
  82     funcs["q"] = &sim_t::interactive_quit;
  83
  84     try
  85     {
  86       if(funcs.count(cmd))
  87         (this->*funcs[cmd])(cmd, args);
  88     }
  89     catch(trap_t t) {}
  90   }
  91   ctrlc_pressed = false;
  92 }
  93
  94 void sim_t::interactive_run_noisy(const std::string& cmd, const std::vector<std::string>& args)
  95 {
  96   interactive_run(cmd,args,true);
  97 }
  98
  99 void sim_t::interactive_run_silent(const std::string& cmd, const std::vector<std::string>& args)
 100 {
 101   interactive_run(cmd,args,false);
 102 }
 103
 104 void sim_t::interactive_run(const std::string& cmd, const std::vector<std::string>& args, bool noisy)
 105 {
 106   size_t steps = args.size() ? atoll(args[0].c_str()) : -1;
 107   ctrlc_pressed = false;
 108   set_procs_debug(noisy);
 109   for (size_t i = 0; i < steps && !ctrlc_pressed && !htif->done(); i++)
 110     step(1);
 111 }
 112
 113 void sim_t::interactive_quit(const std::string& cmd, const std::vector<std::string>& args)
 114 {
 115   exit(0);
 116 }
 117
 118 reg_t sim_t::get_pc(const std::vector<std::string>& args)
 119 {
 120   if(args.size() != 1)
 121     throw trap_illegal_instruction();
 122
 123   int p = atoi(args[0].c_str());
 124   if(p >= (int)num_cores())
 125     throw trap_illegal_instruction();
 126
 127   return procs[p]->state.pc;
 128 }
 129
 130 reg_t sim_t::get_reg(const std::vector<std::string>& args)
 131 {
 132   if(args.size() != 2)
 133     throw trap_illegal_instruction();
 134
 135   int p = atoi(args[0].c_str());
 136   int r = std::find(xpr_name, xpr_name + NXPR, args[1]) - xpr_name;
 137   if (r == NXPR)
 138     r = atoi(args[1].c_str());
 139   if(p >= (int)num_cores() || r >= NXPR)
 140     throw trap_illegal_instruction();
 141
 142   return procs[p]->state.XPR[r];
 143 }
 144
 145 reg_t sim_t::get_freg(const std::vector<std::string>& args)
 146 {
 147   if(args.size() != 2)
 148     throw trap_illegal_instruction();
 149
 150   int p = atoi(args[0].c_str());
 151   int r = std::find(fpr_name, fpr_name + NFPR, args[1]) - fpr_name;
 152   if (r == NFPR)
 153     r = atoi(args[1].c_str());
 154   if(p >= (int)num_cores() || r >= NFPR)
 155     throw trap_illegal_instruction();
 156
 157   return procs[p]->state.FPR[r];
 158 }
 159
 160 void sim_t::interactive_reg(const std::string& cmd, const std::vector<std::string>& args)
 161 {
 162   fprintf(stderr, "0x%016" PRIx64 "\n", get_reg(args));
 163 }
 164
 165 union fpr
 166 {
 167   reg_t r;
 168   float s;
 169   double d;
 170 };
 171
 172 void sim_t::interactive_fregs(const std::string& cmd, const std::vector<std::string>& args)
 173 {
 174   fpr f;
 175   f.r = get_freg(args);
 176   fprintf(stderr, "%g\n",f.s);
 177 }
 178
 179 void sim_t::interactive_fregd(const std::string& cmd, const std::vector<std::string>& args)
 180 {
 181   fpr f;
 182   f.r = get_freg(args);
 183   fprintf(stderr, "%g\n",f.d);
 184 }
 185
 186 reg_t sim_t::get_mem(const std::vector<std::string>& args)
 187 {
 188   if(args.size() != 1 && args.size() != 2)
 189     throw trap_illegal_instruction();
 190
 191   std::string addr_str = args[0];
 192   mmu_t* mmu = debug_mmu;
 193   if(args.size() == 2)
 194   {
 195     int p = atoi(args[0].c_str());
 196     if(p >= (int)num_cores())
 197       throw trap_illegal_instruction();
 198     mmu = procs[p]->get_mmu();
 199     addr_str = args[1];
 200   }
 201
 202   reg_t addr = strtol(addr_str.c_str(),NULL,16), val;
 203   if(addr == LONG_MAX)
 204     addr = strtoul(addr_str.c_str(),NULL,16);
 205
 206   switch(addr % 8)
 207   {
 208     case 0:
 209       val = mmu->load_uint64(addr);
 210       break;
 211     case 4:
 212       val = mmu->load_uint32(addr);
 213       break;
 214     case 2:
 215     case 6:
 216       val = mmu->load_uint16(addr);
 217       break;
 218     default:
 219       val = mmu->load_uint8(addr);
 220       break;
 221   }
 222   return val;
 223 }
 224
 225 void sim_t::interactive_mem(const std::string& cmd, const std::vector<std::string>& args)
 226 {
 227   fprintf(stderr, "0x%016" PRIx64 "\n", get_mem(args));
 228 }
 229
 230 void sim_t::interactive_str(const std::string& cmd, const std::vector<std::string>& args)
 231 {
 232   if(args.size() != 1)
 233     throw trap_illegal_instruction();
 234
 235   reg_t addr = strtol(args[0].c_str(),NULL,16);
 236
 237   char ch;
 238   while((ch = debug_mmu->load_uint8(addr++)))
 239     putchar(ch);
 240
 241   putchar('\n');
 242 }
 243
 244 void sim_t::interactive_until(const std::string& cmd, const std::vector<std::string>& args)
 245 {
 246   bool cmd_until = cmd == "until";
 247
 248   if(args.size() < 3)
 249     return;
 250
 251   reg_t val = strtol(args[args.size()-1].c_str(),NULL,16);
 252   if(val == LONG_MAX)
 253     val = strtoul(args[args.size()-1].c_str(),NULL,16);
 254
 255   std::vector<std::string> args2;
 256   args2 = std::vector<std::string>(args.begin()+1,args.end()-1);
 257
 258   auto func = args[0] == "reg" ? &sim_t::get_reg :
 259               args[0] == "pc"  ? &sim_t::get_pc :
 260               args[0] == "mem" ? &sim_t::get_mem :
 261               NULL;
 262
 263   if (func == NULL)
 264     return;
 265
 266   ctrlc_pressed = false;
 267
 268   while (1)
 269   {
 270     try
 271     {
 272       reg_t current = (this->*func)(args2);
 273
 274       if (cmd_until == (current == val))
 275         break;
 276       if (ctrlc_pressed)
 277         break;
 278     }
 279     catch (trap_t t) {}
 280
 281     set_procs_debug(false);
 282     step(1);
 283   }
 284 }