riscv/jtag_dtm.cc

   1 #include <stdio.h>
   2
   3 #include "jtag_dtm.h"
   4
   5 #if 1
   6 #  define D(x) x
   7 #else
   8 #  define D(x)
   9 #endif
  10
  11 void jtag_dtm_t::set_pins(bool tck, bool tms, bool tdi) {
  12   if (!_tck && tck) {
  13     // Positive clock edge.
  14
  15     switch (state) {
  16       case SHIFT_DR:
  17         dr >>= 1;
  18         dr |= (uint64_t) _tdi << (dr_length-1);
  19         break;
  20       case SHIFT_IR:
  21         ir >>= 1;
  22         ir |= _tdi << (ir_length-1);
  23         break;
  24       default:
  25         break;
  26     }
  27     state = next[state][_tms];
  28     switch (state) {
  29       case TEST_LOGIC_RESET:
  30         ir = idcode_ir;
  31         break;
  32       case CAPTURE_DR:
  33         capture_dr();
  34         break;
  35       case SHIFT_DR:
  36         _tdo = dr & 1;
  37         break;
  38       case UPDATE_DR:
  39         update_dr();
  40         break;
  41       case CAPTURE_IR:
  42         break;
  43       case SHIFT_IR:
  44         _tdo = ir & 1;
  45         break;
  46       case UPDATE_IR:
  47         break;
  48       default:
  49         break;
  50     }
  51   }
  52
  53   _tck = tck;
  54   _tms = tms;
  55   _tdi = tdi;
  56
  57   D(fprintf(stderr, "state=%2d tck=%d tms=%d tdi=%d tdo=%d ir=0x%x dr=0x%lx\n",
  58         state, _tck, _tms, _tdi, _tdo, ir, dr));
  59 }
  60
  61 void jtag_dtm_t::capture_dr()
  62 {
  63   switch (ir) {
  64     case idcode_ir:
  65       dr = 0xdeadbeef;
  66       dr_length = 32;
  67       break;
  68     case dtmcontrol_ir:
  69       dr = dtmcontrol;
  70       dr_length = 32;
  71     default:
  72       D(fprintf(stderr, "Unsupported IR: 0x%x\n", ir));
  73       break;
  74   }
  75   D(fprintf(stderr, "Capture DR; IR=0x%x, DR=0x%lx (%d bits)\n",
  76         ir, dr, dr_length));
  77 }
  78
  79 void jtag_dtm_t::update_dr()
  80 {
  81 }