Merge pull request #117 from riscv/multicore_debug
[riscv-isa-sim.git] / riscv / memtracer.h
1 // See LICENSE for license details.
2
3 #ifndef _MEMTRACER_H
4 #define _MEMTRACER_H
5
6 #include <cstdint>
7 #include <string.h>
8 #include <vector>
9
10 enum access_type {
11 LOAD,
12 STORE,
13 FETCH,
14 };
15
16 class memtracer_t
17 {
18 public:
19 memtracer_t() {}
20 virtual ~memtracer_t() {}
21
22 virtual bool interested_in_range(uint64_t begin, uint64_t end, access_type type) = 0;
23 virtual void trace(uint64_t addr, size_t bytes, access_type type) = 0;
24 };
25
26 class memtracer_list_t : public memtracer_t
27 {
28 public:
29 bool empty() { return list.empty(); }
30 bool interested_in_range(uint64_t begin, uint64_t end, access_type type)
31 {
32 for (std::vector<memtracer_t*>::iterator it = list.begin(); it != list.end(); ++it)
33 if ((*it)->interested_in_range(begin, end, type))
34 return true;
35 return false;
36 }
37 void trace(uint64_t addr, size_t bytes, access_type type)
38 {
39 for (std::vector<memtracer_t*>::iterator it = list.begin(); it != list.end(); ++it)
40 (*it)->trace(addr, bytes, type);
41 }
42 void hook(memtracer_t* h)
43 {
44 list.push_back(h);
45 }
46 private:
47 std::vector<memtracer_t*> list;
48 };
49
50 #endif