1 #ifndef _RISCV_PROCESSOR_H
2 #define _RISCV_PROCESSOR_H
12 #define DISPATCH_TABLE_SIZE 1024
14 typedef reg_t (*insn_func_t
)(processor_t
*, insn_t
, reg_t
);
21 processor_t(sim_t
* _sim
, char* _mem
, size_t _memsz
);
23 void init(uint32_t _id
, icsim_t
* defualt_icache
, icsim_t
* default_dcache
);
24 void step(size_t n
, bool noisy
);
34 // privileged control registers
51 // unprivileged control registers
54 // # of bits in an XPR (32 or 64). (redundant with sr)
65 void take_interrupt();
66 void set_sr(uint32_t val
);
67 void set_fsr(uint32_t val
);
68 void take_trap(trap_t t
, bool noisy
);
69 void disasm(insn_t insn
, reg_t pc
);
73 void setvl(int vlapp
);
76 uint32_t vecbanks_count
;
85 processor_t
* uts
[MAX_UTS
];
95 static insn_func_t dispatch_table
[DISPATCH_TABLE_SIZE
];
96 reg_t
dispatch(insn_t insn
, reg_t pc
);
97 static void initialize_dispatch_table();
99 #define DECLARE_INSN(name, m, o) reg_t insn_func_ ## name (insn_t, reg_t);