Changed supervisor mode
[riscv-isa-sim.git] / riscv / processor.h
1 #ifndef _RISCV_PROCESSOR_H
2 #define _RISCV_PROCESSOR_H
3
4 #include "decode.h"
5 #include <cstring>
6 #include "trap.h"
7
8 #define MAX_UTS 2048
9
10 class processor_t;
11 class mmu_t;
12 typedef reg_t (*insn_func_t)(processor_t*, insn_t, reg_t);
13 class sim_t;
14
15 // this class represents one processor in a RISC-V machine.
16 class processor_t
17 {
18 public:
19 processor_t(sim_t* _sim, mmu_t* _mmu, uint32_t _id);
20 ~processor_t();
21
22 void step(size_t n, bool noisy); // run for n cycles
23 void deliver_ipi(); // register an interprocessor interrupt
24
25 private:
26 sim_t& sim;
27 mmu_t& mmu; // main memory is always accessed via the mmu
28
29 // user-visible architected state
30 reg_t XPR[NXPR];
31 freg_t FPR[NFPR];
32 reg_t pc;
33
34 // counters
35 reg_t cycle;
36
37 // privileged control registers
38 reg_t epc;
39 reg_t badvaddr;
40 reg_t evec;
41 reg_t pcr_k0;
42 reg_t pcr_k1;
43 uint32_t cause;
44 uint32_t interrupts_pending;
45 uint32_t id;
46 uint32_t sr; // only modify the status register using set_sr()
47 uint32_t fsr;
48 uint32_t count;
49 uint32_t compare;
50
51 // # of bits in an XPR (32 or 64). (redundant with sr)
52 int xprlen;
53
54 // is this processor running? (deliver_ipi() sets this)
55 bool run;
56
57 // functions
58 void reset(); // resets architected state; halts processor if it was running
59 void take_interrupt(); // take a trap if any interrupts are pending
60 void set_sr(uint32_t val); // set the status register
61 void set_fsr(uint32_t val); // set the floating-point status register
62 void take_trap(trap_t t, bool noisy); // take an exception
63 void disasm(insn_t insn, reg_t pc); // disassemble and print an instruction
64
65 // vector stuff
66 void vcfg();
67 void setvl(int vlapp);
68
69 reg_t vecbanks;
70 uint32_t vecbanks_count;
71
72 bool utmode;
73 uint32_t utidx;
74 int vlmax;
75 int vl;
76 int nxfpr_bank;
77 int nxpr_use;
78 int nfpr_use;
79 processor_t* uts[MAX_UTS];
80
81 // this constructor is used for each of the uts
82 processor_t(sim_t* _sim, mmu_t* _mmu, uint32_t _id, uint32_t _utidx);
83
84 friend class sim_t;
85 friend class mmu_t;
86
87 #include "dispatch.h"
88 };
89
90 #endif