riscv/riscv.ac

   1 AC_ARG_ENABLE([fpu], AS_HELP_STRING([--disable-fpu], [Disable floating-point]))
   2 AS_IF([test "x$enable_fpu" != "xno"], [
   3   AC_DEFINE([RISCV_ENABLE_FPU],,[Define if floating-point instructions are supported])
   4 ])
   5
   6 AC_ARG_ENABLE([64bit], AS_HELP_STRING([--disable-64bit], [Disable 64-bit mode]))
   7 AS_IF([test "x$enable_64bit" != "xno"], [
   8   AC_DEFINE([RISCV_ENABLE_64BIT],,[Define if 64-bit mode is supported])
   9 ])
  10
  11 AC_ARG_ENABLE([rvc], AS_HELP_STRING([--enable-rvc], [Enable instruction compression]))
  12 AS_IF([test "x$enable_rvc" = "xyes"], [
  13   AC_DEFINE([RISCV_ENABLE_RVC],,[Define if instruction compression is supported])
  14 ])
  15
  16 AC_ARG_ENABLE([vec], AS_HELP_STRING([--disable-vec], [Disable vector processor]))
  17 AS_IF([test "x$enable_vec" != "xno"], [
  18   AC_DEFINE([RISCV_ENABLE_VEC],,[Define if vector processor is supported])
  19 ])
  20
  21 AC_ARG_ENABLE([icsim], AS_HELP_STRING([--enable-icsim], [Enable instruction cache simulator]))
  22 AS_IF([test "x$enable_icsim" = "xyes"], [
  23   AC_DEFINE([RISCV_ENABLE_ICSIM],,[Define if instruction cache simulator is enabled])
  24 ])
  25
  26 libopc=`dirname \`which riscv-gcc\``/../`$ac_config_guess`/riscv/lib/libopcodes.a
  27 AC_CHECK_FILES([$libopc],[have_libopcodes="yes"],[have_libopcodes="no"])
  28
  29 AC_SEARCH_LIBS([bfd_init],[bfd],[],[have_libopcodes="no"])
  30
  31 AS_IF([test "$have_libopcodes" = "no"],[
  32   AC_MSG_WARN([Could not find opcodes library])
  33   AC_MSG_WARN([Build will not include disassembly support])
  34 ],[
  35   LIBS="$libopc $LIBS"
  36   AC_DEFINE([RISCV_HAVE_LIBOPCODES],,[Define if libopcodes exists])
  37 ])