[xcc] minor performance tweaks
[riscv-isa-sim.git] / riscv / riscv.mk.in
1 riscv_subproject_deps = \
2 softfloat_riscv \
3 softfloat \
4
5 riscv_insn_hdrs := $(notdir $(wildcard $(src_dir)/riscv/insns/*.h))
6
7 riscv_hdrs = \
8 applink.h \
9 common.h \
10 decode.h \
11 mmu.h \
12 processor.h \
13 sim.h \
14 trap.h \
15 opcodes.h \
16 insn_header.h \
17 insn_footer.h \
18 dispatch.h \
19
20 NDISPATCH := 10
21 DISPATCH_SRCS := \
22 dispatch0.cc \
23 dispatch1.cc \
24 dispatch2.cc \
25 dispatch3.cc \
26 dispatch4.cc \
27 dispatch5.cc \
28 dispatch6.cc \
29 dispatch7.cc \
30 dispatch8.cc \
31 dispatch9.cc \
32 dispatch10.cc \
33
34 $(DISPATCH_SRCS): %.cc: dispatch $(wildcard insns/*.h) $(riscv_hdrs)
35 $< $(subst dispatch,,$(subst .cc,,$@)) $(NDISPATCH) 1024 < $(src_dir)/riscv/opcodes.h > $@
36
37 $(src_dir)/riscv/dispatch.h: %.h: dispatch
38 $< $(NDISPATCH) 1024 < $(src_dir)/riscv/opcodes.h > $@
39
40 $(patsubst %.h, %.cc, $(riscv_insn_hdrs)): %.cc: insns/%.h $(riscv_hdrs)
41 @echo \#define FUNC insn_func_$(@:.cc=) > $@
42 @echo \#define OPCODE_MASK MASK_$(@:.cc=) >> $@
43 @echo \#define OPCODE_MATCH MATCH_$(@:.cc=) >> $@
44 @cat $(src_dir)/riscv/insn_header.h >> $@
45 @cat $< >> $@
46 @cat $(src_dir)/riscv/insn_footer.h >> $@
47
48 riscv_srcs = \
49 applink.cc \
50 processor.cc \
51 sim.cc \
52 trap.cc \
53 icsim.cc \
54 mmu.cc \
55 $(DISPATCH_SRCS) \
56
57 riscv_test_srcs =
58
59 riscv_install_prog_srcs = \
60 riscv-isa-run.cc \