[sim, opcodes] made sim more decoupled from opcodes
[riscv-isa-sim.git] / riscv / riscv.mk.in
1 riscv_subproject_deps = \
2 softfloat_riscv \
3 softfloat \
4
5 riscv_insn_hdrs := $(notdir $(wildcard $(src_dir)/riscv/insns/*.h))
6
7 riscv_hdrs = \
8 applink.h \
9 common.h \
10 decode.h \
11 mmu.h \
12 processor.h \
13 sim.h \
14 trap.h \
15 opcodes.h \
16 insn_header.h \
17 insn_footer.h \
18
19 $(patsubst %.h, %.cc, $(riscv_insn_hdrs)): %.cc: insns/%.h $(riscv_hdrs)
20 @echo \#define FUNC insn_func_$(@:.cc=) > $@
21 @echo \#define OPCODE_MASK MASK_$(@:.cc=) >> $@
22 @echo \#define OPCODE_MATCH MATCH_$(@:.cc=) >> $@
23 @cat $(src_dir)/riscv/insn_header.h >> $@
24 @cat $< >> $@
25 @cat $(src_dir)/riscv/insn_footer.h >> $@
26
27 riscv_srcs = \
28 applink.cc \
29 processor.cc \
30 sim.cc \
31 trap.cc \
32 icsim.cc \
33 mmu.cc \
34 $(patsubst %.h, %.cc, $(riscv_insn_hdrs)) \
35
36 riscv_test_srcs =
37
38 riscv_install_prog_srcs = \
39 riscv-isa-run.cc \