riscv/rocc.cc

   1 // See LICENSE for license details.
   2
   3 #include "rocc.h"
   4 #include "trap.h"
   5 #include <cstdlib>
   6
   7 #define customX(n) \
   8   static reg_t c##n(processor_t* p, insn_t insn, reg_t pc) \
   9   { \
  10     rocc_t* rocc = static_cast<rocc_t*>(p->get_extension()); \
  11     rocc_insn_union_t u; \
  12     u.i = insn; \
  13     reg_t xs1 = u.r.xs1 ? RS1 : -1; \
  14     reg_t xs2 = u.r.xs2 ? RS2 : -1; \
  15     reg_t xd = rocc->custom##n(u.r, xs1, xs2); \
  16     if (u.r.xd) \
  17       WRITE_RD(xd); \
  18     return pc+4; \
  19   } \
  20   \
  21   reg_t rocc_t::custom##n(rocc_insn_t insn, reg_t xs1, reg_t xs2) \
  22   { \
  23     illegal_instruction(); \
  24     return 0; \
  25   }
  26
  27 customX(0)
  28 customX(1)
  29 customX(2)
  30 customX(3)
  31
  32 std::vector<insn_desc_t> rocc_t::get_instructions()
  33 {
  34   std::vector<insn_desc_t> insns;
  35   insns.push_back((insn_desc_t){0x0b, 0x7f, &::illegal_instruction, c0});
  36   insns.push_back((insn_desc_t){0x2b, 0x7f, &::illegal_instruction, c1});
  37   insns.push_back((insn_desc_t){0x5b, 0x7f, &::illegal_instruction, c2});
  38   insns.push_back((insn_desc_t){0x7b, 0x7f, &::illegal_instruction, c3});
  39   return insns;
  40 }
  41
  42 std::vector<disasm_insn_t*> rocc_t::get_disasms()
  43 {
  44   std::vector<disasm_insn_t*> insns;
  45   return insns;
  46 }