riscv/sim.cc

   1 #include "sim.h"
   2 #include "htif.h"
   3 #include <sys/mman.h>
   4 #include <map>
   5 #include <iostream>
   6 #include <climits>
   7 #include <assert.h>
   8
   9 sim_t::sim_t(int _nprocs, htif_t* _htif)
  10   : htif(_htif),
  11     procs(_nprocs),
  12     running(false)
  13 {
  14   // allocate target machine's memory, shrinking it as necessary
  15   // until the allocation succeeds
  16
  17   size_t memsz0 = sizeof(size_t) == 8 ? 0x100000000ULL : 0x70000000UL;
  18   size_t quantum = std::max(PGSIZE, (reg_t)sysconf(_SC_PAGESIZE));
  19   memsz0 = memsz0/quantum*quantum;
  20
  21   memsz = memsz0;
  22   mem = (char*)mmap64(NULL, memsz, PROT_WRITE, MAP_PRIVATE|MAP_ANON, -1, 0);
  23
  24   if(mem == MAP_FAILED)
  25   {
  26     while(mem == MAP_FAILED && (memsz = memsz*10/11/quantum*quantum))
  27       mem = (char*)mmap64(NULL, memsz, PROT_WRITE, MAP_PRIVATE|MAP_ANON, -1, 0);
  28     assert(mem != MAP_FAILED);
  29     fprintf(stderr, "warning: only got %lu bytes of target mem (wanted %lu)\n",
  30             (unsigned long)memsz, (unsigned long)memsz0);
  31   }
  32
  33   mmu = new mmu_t(mem, memsz);
  34
  35   for(size_t i = 0; i < num_cores(); i++)
  36     procs[i] = new processor_t(this, new mmu_t(mem, memsz), i);
  37
  38   htif->init(this);
  39 }
  40
  41 sim_t::~sim_t()
  42 {
  43   for(size_t i = 0; i < num_cores(); i++)
  44   {
  45     mmu_t* pmmu = &procs[i]->mmu;
  46     delete procs[i];
  47     delete pmmu;
  48   }
  49   delete mmu;
  50   munmap(mem, memsz);
  51 }
  52
  53 void sim_t::set_tohost(reg_t val)
  54 {
  55   fromhost = 0;
  56   tohost = val;
  57 }
  58
  59 reg_t sim_t::get_fromhost()
  60 {
  61   htif->wait_for_fromhost_write();
  62   return fromhost;
  63 }
  64
  65 void sim_t::send_ipi(reg_t who)
  66 {
  67   if(who < num_cores())
  68     procs[who]->deliver_ipi();
  69 }
  70
  71 void sim_t::run(bool debug)
  72 {
  73   htif->wait_for_start();
  74
  75   // start core 0
  76   send_ipi(0);
  77
  78   for(running = true; running; )
  79   {
  80     if(!debug)
  81       step_all(100,100,false);
  82     else
  83       interactive();
  84   }
  85 }
  86
  87 void sim_t::step_all(size_t n, size_t interleave, bool noisy)
  88 {
  89   for(size_t j = 0; j < n; j+=interleave)
  90     for(int i = 0; i < (int)num_cores(); i++)
  91       procs[i]->step(interleave,noisy);
  92 }