add I$/D$/L2$ simulators
[riscv-isa-sim.git] / riscv / sim.h
1 #ifndef _RISCV_SIM_H
2 #define _RISCV_SIM_H
3
4 #include <vector>
5 #include <string>
6 #include "processor.h"
7 #include "mmu.h"
8
9 class htif_isasim_t;
10
11 // this class encapsulates the processors and memory in a RISC-V machine.
12 class sim_t
13 {
14 public:
15 sim_t(int _nprocs, int mem_mb, const std::vector<std::string>& htif_args);
16 ~sim_t();
17
18 // run the simulation to completion
19 void run(bool debug);
20
21 // deliver an IPI to a specific processor
22 void send_ipi(reg_t who);
23
24 // returns the number of processors in this simulator
25 size_t num_cores() { return procs.size(); }
26 processor_t* get_core(size_t i) { return procs[i]; }
27
28 // read one of the system control registers
29 reg_t get_scr(int which);
30
31 private:
32 htif_isasim_t* htif;
33
34 // main memory, shared between processors
35 char* mem;
36 size_t memsz; // memory size in bytes
37 mmu_t* mmu; // debug port into main memory
38
39 // processors
40 std::vector<processor_t*> procs;
41
42 // run each processor for n instructions; interleave instructions are
43 // run on a processor before moving on to the next processor.
44 // interleave must divide n.
45 // if noisy, print out the instructions as they execute.
46 void step_all(size_t n, size_t interleave, bool noisy);
47
48 // presents a prompt for introspection into the simulation
49 void interactive();
50
51 // functions that help implement interactive()
52 void interactive_quit(const std::string& cmd, const std::vector<std::string>& args);
53 void interactive_run(const std::string& cmd, const std::vector<std::string>& args, bool noisy);
54 void interactive_run_noisy(const std::string& cmd, const std::vector<std::string>& args);
55 void interactive_run_silent(const std::string& cmd, const std::vector<std::string>& args);
56 void interactive_run_proc(const std::string& cmd, const std::vector<std::string>& args, bool noisy);
57 void interactive_run_proc_noisy(const std::string& cmd, const std::vector<std::string>& args);
58 void interactive_run_proc_silent(const std::string& cmd, const std::vector<std::string>& args);
59 void interactive_reg(const std::string& cmd, const std::vector<std::string>& args);
60 void interactive_fregs(const std::string& cmd, const std::vector<std::string>& args);
61 void interactive_fregd(const std::string& cmd, const std::vector<std::string>& args);
62 void interactive_mem(const std::string& cmd, const std::vector<std::string>& args);
63 void interactive_str(const std::string& cmd, const std::vector<std::string>& args);
64 void interactive_until(const std::string& cmd, const std::vector<std::string>& args);
65 reg_t get_reg(const std::vector<std::string>& args);
66 reg_t get_freg(const std::vector<std::string>& args);
67 reg_t get_mem(const std::vector<std::string>& args);
68 reg_t get_pc(const std::vector<std::string>& args);
69 reg_t get_tohost(const std::vector<std::string>& args);
70
71 friend class htif_isasim_t;
72 };
73
74 #endif