add load-reserved/store-conditional instructions
[riscv-isa-sim.git] / riscv / sim.h
1 // See LICENSE for license details.
2
3 #ifndef _RISCV_SIM_H
4 #define _RISCV_SIM_H
5
6 #include <vector>
7 #include <string>
8 #include "processor.h"
9 #include "mmu.h"
10
11 class htif_isasim_t;
12
13 // this class encapsulates the processors and memory in a RISC-V machine.
14 class sim_t
15 {
16 public:
17 sim_t(int _nprocs, int mem_mb, const std::vector<std::string>& htif_args);
18 ~sim_t();
19
20 // run the simulation to completion
21 void run(bool debug);
22
23 // deliver an IPI to a specific processor
24 void send_ipi(reg_t who);
25
26 // returns the number of processors in this simulator
27 size_t num_cores() { return procs.size(); }
28 processor_t* get_core(size_t i) { return procs[i]; }
29
30 // read one of the system control registers
31 reg_t get_scr(int which);
32
33 private:
34 htif_isasim_t* htif;
35 char* mem; // main memory
36 size_t memsz; // memory size in bytes
37 mmu_t* mmu; // debug port into main memory
38 std::vector<processor_t*> procs;
39
40 void step(size_t n, bool noisy); // step through simulation
41 static const size_t INTERLEAVE = 5000;
42 size_t current_step;
43 size_t current_proc;
44
45 // presents a prompt for introspection into the simulation
46 void interactive();
47
48 // functions that help implement interactive()
49 void interactive_quit(const std::string& cmd, const std::vector<std::string>& args);
50 void interactive_run(const std::string& cmd, const std::vector<std::string>& args, bool noisy);
51 void interactive_run_noisy(const std::string& cmd, const std::vector<std::string>& args);
52 void interactive_run_silent(const std::string& cmd, const std::vector<std::string>& args);
53 void interactive_run_proc(const std::string& cmd, const std::vector<std::string>& args, bool noisy);
54 void interactive_run_proc_noisy(const std::string& cmd, const std::vector<std::string>& args);
55 void interactive_run_proc_silent(const std::string& cmd, const std::vector<std::string>& args);
56 void interactive_reg(const std::string& cmd, const std::vector<std::string>& args);
57 void interactive_fregs(const std::string& cmd, const std::vector<std::string>& args);
58 void interactive_fregd(const std::string& cmd, const std::vector<std::string>& args);
59 void interactive_mem(const std::string& cmd, const std::vector<std::string>& args);
60 void interactive_str(const std::string& cmd, const std::vector<std::string>& args);
61 void interactive_until(const std::string& cmd, const std::vector<std::string>& args);
62 reg_t get_reg(const std::vector<std::string>& args);
63 reg_t get_freg(const std::vector<std::string>& args);
64 reg_t get_mem(const std::vector<std::string>& args);
65 reg_t get_pc(const std::vector<std::string>& args);
66 reg_t get_tohost(const std::vector<std::string>& args);
67
68 friend class htif_isasim_t;
69 };
70
71 #endif