riscv/sim.h

   1 // See LICENSE for license details.
   2
   3 #ifndef _RISCV_SIM_H
   4 #define _RISCV_SIM_H
   5
   6 #include <vector>
   7 #include <string>
   8 #include <memory>
   9 #include "processor.h"
  10 #include "mmu.h"
  11
  12 class htif_isasim_t;
  13
  14 // this class encapsulates the processors and memory in a RISC-V machine.
  15 class sim_t
  16 {
  17 public:
  18   sim_t(size_t _nprocs, size_t mem_mb, const std::vector<std::string>& htif_args);
  19   ~sim_t();
  20
  21   // run the simulation to completion
  22   int run();
  23   bool running();
  24   void stop();
  25   void set_debug(bool value);
  26   void set_procs_debug(bool value);
  27
  28   // deliver an IPI to a specific processor
  29   void send_ipi(reg_t who);
  30
  31   // returns the number of processors in this simulator
  32   size_t num_cores() { return procs.size(); }
  33   processor_t* get_core(size_t i) { return procs[i]; }
  34
  35   // read one of the system control registers
  36   reg_t get_scr(int which);
  37
  38 private:
  39   std::auto_ptr<htif_isasim_t> htif;
  40   char* mem; // main memory
  41   size_t memsz; // memory size in bytes
  42   mmu_t* debug_mmu;  // debug port into main memory
  43   std::vector<processor_t*> procs;
  44
  45   void step(size_t n); // step through simulation
  46   static const size_t INTERLEAVE = 5000;
  47   size_t current_step;
  48   size_t current_proc;
  49   bool debug;
  50
  51   // presents a prompt for introspection into the simulation
  52   void interactive();
  53
  54   // functions that help implement interactive()
  55   void interactive_quit(const std::string& cmd, const std::vector<std::string>& args);
  56   void interactive_run(const std::string& cmd, const std::vector<std::string>& args, bool noisy);
  57   void interactive_run_noisy(const std::string& cmd, const std::vector<std::string>& args);
  58   void interactive_run_silent(const std::string& cmd, const std::vector<std::string>& args);
  59   void interactive_reg(const std::string& cmd, const std::vector<std::string>& args);
  60   void interactive_fregs(const std::string& cmd, const std::vector<std::string>& args);
  61   void interactive_fregd(const std::string& cmd, const std::vector<std::string>& args);
  62   void interactive_mem(const std::string& cmd, const std::vector<std::string>& args);
  63   void interactive_str(const std::string& cmd, const std::vector<std::string>& args);
  64   void interactive_until(const std::string& cmd, const std::vector<std::string>& args);
  65   reg_t get_reg(const std::vector<std::string>& args);
  66   reg_t get_freg(const std::vector<std::string>& args);
  67   reg_t get_mem(const std::vector<std::string>& args);
  68   reg_t get_pc(const std::vector<std::string>& args);
  69   reg_t get_tohost(const std::vector<std::string>& args);
  70
  71   friend class htif_isasim_t;
  72 };
  73
  74 extern volatile bool ctrlc_pressed;
  75
  76 #endif