Merge pull request #165 from riscv/small_progbuf
[riscv-isa-sim.git] / spike_main / disasm.cc
1 // See LICENSE for license details.
2
3 #include "disasm.h"
4 #include <string>
5 #include <vector>
6 #include <cstdarg>
7 #include <sstream>
8 #include <stdlib.h>
9
10 struct : public arg_t {
11 std::string to_string(insn_t insn) const {
12 return std::to_string((int)insn.i_imm()) + '(' + xpr_name[insn.rs1()] + ')';
13 }
14 } load_address;
15
16 struct : public arg_t {
17 std::string to_string(insn_t insn) const {
18 return std::to_string((int)insn.s_imm()) + '(' + xpr_name[insn.rs1()] + ')';
19 }
20 } store_address;
21
22 struct : public arg_t {
23 std::string to_string(insn_t insn) const {
24 return std::string("(") + xpr_name[insn.rs1()] + ')';
25 }
26 } amo_address;
27
28 struct : public arg_t {
29 std::string to_string(insn_t insn) const {
30 return xpr_name[insn.rd()];
31 }
32 } xrd;
33
34 struct : public arg_t {
35 std::string to_string(insn_t insn) const {
36 return xpr_name[insn.rs1()];
37 }
38 } xrs1;
39
40 struct : public arg_t {
41 std::string to_string(insn_t insn) const {
42 return xpr_name[insn.rs2()];
43 }
44 } xrs2;
45
46 struct : public arg_t {
47 std::string to_string(insn_t insn) const {
48 return fpr_name[insn.rd()];
49 }
50 } frd;
51
52 struct : public arg_t {
53 std::string to_string(insn_t insn) const {
54 return fpr_name[insn.rs1()];
55 }
56 } frs1;
57
58 struct : public arg_t {
59 std::string to_string(insn_t insn) const {
60 return fpr_name[insn.rs2()];
61 }
62 } frs2;
63
64 struct : public arg_t {
65 std::string to_string(insn_t insn) const {
66 return fpr_name[insn.rs3()];
67 }
68 } frs3;
69
70 struct : public arg_t {
71 std::string to_string(insn_t insn) const {
72 switch (insn.csr())
73 {
74 #define DECLARE_CSR(name, num) case num: return #name;
75 #include "encoding.h"
76 #undef DECLARE_CSR
77 default:
78 {
79 char buf[16];
80 snprintf(buf, sizeof buf, "unknown_%03" PRIx64, insn.csr());
81 return std::string(buf);
82 }
83 }
84 }
85 } csr;
86
87 struct : public arg_t {
88 std::string to_string(insn_t insn) const {
89 return std::to_string((int)insn.i_imm());
90 }
91 } imm;
92
93 struct : public arg_t {
94 std::string to_string(insn_t insn) const {
95 std::stringstream s;
96 s << std::hex << "0x" << ((uint32_t)insn.u_imm() >> 12);
97 return s.str();
98 }
99 } bigimm;
100
101 struct : public arg_t {
102 std::string to_string(insn_t insn) const {
103 return std::to_string(insn.rs1());
104 }
105 } zimm5;
106
107 struct : public arg_t {
108 std::string to_string(insn_t insn) const {
109 std::stringstream s;
110 int32_t target = insn.sb_imm();
111 char sign = target >= 0 ? '+' : '-';
112 s << "pc " << sign << ' ' << abs(target);
113 return s.str();
114 }
115 } branch_target;
116
117 struct : public arg_t {
118 std::string to_string(insn_t insn) const {
119 std::stringstream s;
120 int32_t target = insn.uj_imm();
121 char sign = target >= 0 ? '+' : '-';
122 s << "pc " << sign << std::hex << " 0x" << abs(target);
123 return s.str();
124 }
125 } jump_target;
126
127 struct : public arg_t {
128 std::string to_string(insn_t insn) const {
129 return xpr_name[insn.rvc_rs1()];
130 }
131 } rvc_rs1;
132
133 struct : public arg_t {
134 std::string to_string(insn_t insn) const {
135 return xpr_name[insn.rvc_rs2()];
136 }
137 } rvc_rs2;
138
139 struct : public arg_t {
140 std::string to_string(insn_t insn) const {
141 return xpr_name[insn.rvc_rs1s()];
142 }
143 } rvc_rs1s;
144
145 struct : public arg_t {
146 std::string to_string(insn_t insn) const {
147 return xpr_name[insn.rvc_rs2s()];
148 }
149 } rvc_rs2s;
150
151 struct : public arg_t {
152 std::string to_string(insn_t insn) const {
153 return xpr_name[X_SP];
154 }
155 } rvc_sp;
156
157 struct : public arg_t {
158 std::string to_string(insn_t insn) const {
159 return std::to_string((int)insn.rvc_imm());
160 }
161 } rvc_imm;
162
163 struct : public arg_t {
164 std::string to_string(insn_t insn) const {
165 return std::to_string((int)insn.rvc_addi4spn_imm());
166 }
167 } rvc_addi4spn_imm;
168
169 struct : public arg_t {
170 std::string to_string(insn_t insn) const {
171 return std::to_string((int)insn.rvc_addi16sp_imm());
172 }
173 } rvc_addi16sp_imm;
174
175 struct : public arg_t {
176 std::string to_string(insn_t insn) const {
177 return std::to_string((int)insn.rvc_lwsp_imm());
178 }
179 } rvc_lwsp_imm;
180
181 struct : public arg_t {
182 std::string to_string(insn_t insn) const {
183 return std::to_string((int)(insn.rvc_imm() & 0x3f));
184 }
185 } rvc_shamt;
186
187 struct : public arg_t {
188 std::string to_string(insn_t insn) const {
189 std::stringstream s;
190 s << std::hex << "0x" << (uint32_t)insn.rvc_imm();
191 return s.str();
192 }
193 } rvc_uimm;
194
195 struct : public arg_t {
196 std::string to_string(insn_t insn) const {
197 return std::to_string((int)insn.rvc_lwsp_imm()) + '(' + xpr_name[X_SP] + ')';
198 }
199 } rvc_lwsp_address;
200
201 struct : public arg_t {
202 std::string to_string(insn_t insn) const {
203 return std::to_string((int)insn.rvc_ldsp_imm()) + '(' + xpr_name[X_SP] + ')';
204 }
205 } rvc_ldsp_address;
206
207 struct : public arg_t {
208 std::string to_string(insn_t insn) const {
209 return std::to_string((int)insn.rvc_swsp_imm()) + '(' + xpr_name[X_SP] + ')';
210 }
211 } rvc_swsp_address;
212
213 struct : public arg_t {
214 std::string to_string(insn_t insn) const {
215 return std::to_string((int)insn.rvc_sdsp_imm()) + '(' + xpr_name[X_SP] + ')';
216 }
217 } rvc_sdsp_address;
218
219 struct : public arg_t {
220 std::string to_string(insn_t insn) const {
221 return std::to_string((int)insn.rvc_lw_imm()) + '(' + xpr_name[insn.rvc_rs1s()] + ')';
222 }
223 } rvc_lw_address;
224
225 struct : public arg_t {
226 std::string to_string(insn_t insn) const {
227 return std::to_string((int)insn.rvc_ld_imm()) + '(' + xpr_name[insn.rvc_rs1s()] + ')';
228 }
229 } rvc_ld_address;
230
231 struct : public arg_t {
232 std::string to_string(insn_t insn) const {
233 std::stringstream s;
234 int32_t target = insn.rvc_b_imm();
235 char sign = target >= 0 ? '+' : '-';
236 s << "pc " << sign << ' ' << abs(target);
237 return s.str();
238 }
239 } rvc_branch_target;
240
241 struct : public arg_t {
242 std::string to_string(insn_t insn) const {
243 std::stringstream s;
244 int32_t target = insn.rvc_j_imm();
245 char sign = target >= 0 ? '+' : '-';
246 s << "pc " << sign << ' ' << abs(target);
247 return s.str();
248 }
249 } rvc_jump_target;
250
251 std::string disassembler_t::disassemble(insn_t insn) const
252 {
253 const disasm_insn_t* disasm_insn = lookup(insn);
254 return disasm_insn ? disasm_insn->to_string(insn) : "unknown";
255 }
256
257 disassembler_t::disassembler_t(int xlen)
258 {
259 const uint32_t mask_rd = 0x1fUL << 7;
260 const uint32_t match_rd_ra = 1UL << 7;
261 const uint32_t mask_rs1 = 0x1fUL << 15;
262 const uint32_t match_rs1_ra = 1UL << 15;
263 const uint32_t mask_rs2 = 0x1fUL << 20;
264 const uint32_t mask_imm = 0xfffUL << 20;
265 const uint32_t match_imm_1 = 1UL << 20;
266 const uint32_t mask_rvc_rs2 = 0x1fUL << 2;
267 const uint32_t mask_rvc_imm = mask_rvc_rs2 | 0x1000UL;
268
269 #define DECLARE_INSN(code, match, mask) \
270 const uint32_t match_##code = match; \
271 const uint32_t mask_##code = mask;
272 #include "encoding.h"
273 #undef DECLARE_INSN
274
275 // explicit per-instruction disassembly
276 #define DISASM_INSN(name, code, extra, ...) \
277 add_insn(new disasm_insn_t(name, match_##code, mask_##code | (extra), __VA_ARGS__));
278 #define DEFINE_NOARG(code) \
279 add_insn(new disasm_insn_t(#code, match_##code, mask_##code, {}));
280 #define DEFINE_RTYPE(code) DISASM_INSN(#code, code, 0, {&xrd, &xrs1, &xrs2})
281 #define DEFINE_ITYPE(code) DISASM_INSN(#code, code, 0, {&xrd, &xrs1, &imm})
282 #define DEFINE_I0TYPE(name, code) DISASM_INSN(name, code, mask_rs1, {&xrd, &imm})
283 #define DEFINE_I1TYPE(name, code) DISASM_INSN(name, code, mask_imm, {&xrd, &xrs1})
284 #define DEFINE_I2TYPE(name, code) DISASM_INSN(name, code, mask_rd | mask_imm, {&xrs1})
285 #define DEFINE_LTYPE(code) DISASM_INSN(#code, code, 0, {&xrd, &bigimm})
286 #define DEFINE_BTYPE(code) DISASM_INSN(#code, code, 0, {&xrs1, &xrs2, &branch_target})
287 #define DEFINE_B0TYPE(name, code) DISASM_INSN(name, code, mask_rs1 | mask_rs2, {&branch_target})
288 #define DEFINE_B1TYPE(name, code) DISASM_INSN(name, code, mask_rs2, {&xrs1, &branch_target})
289 #define DEFINE_XLOAD(code) DISASM_INSN(#code, code, 0, {&xrd, &load_address})
290 #define DEFINE_XSTORE(code) DISASM_INSN(#code, code, 0, {&xrs2, &store_address})
291 #define DEFINE_XAMO(code) DISASM_INSN(#code, code, 0, {&xrd, &xrs2, &amo_address})
292 #define DEFINE_FLOAD(code) DISASM_INSN(#code, code, 0, {&frd, &load_address})
293 #define DEFINE_FSTORE(code) DISASM_INSN(#code, code, 0, {&frs2, &store_address})
294 #define DEFINE_FRTYPE(code) DISASM_INSN(#code, code, 0, {&frd, &frs1, &frs2})
295 #define DEFINE_FR1TYPE(code) DISASM_INSN(#code, code, 0, {&frd, &frs1})
296 #define DEFINE_FR3TYPE(code) DISASM_INSN(#code, code, 0, {&frd, &frs1, &frs2, &frs3})
297 #define DEFINE_FXTYPE(code) DISASM_INSN(#code, code, 0, {&xrd, &frs1})
298 #define DEFINE_XFTYPE(code) DISASM_INSN(#code, code, 0, {&frd, &xrs1})
299
300 DEFINE_XLOAD(lb)
301 DEFINE_XLOAD(lbu)
302 DEFINE_XLOAD(lh)
303 DEFINE_XLOAD(lhu)
304 DEFINE_XLOAD(lw)
305 DEFINE_XLOAD(lwu)
306 DEFINE_XLOAD(ld)
307
308 DEFINE_XSTORE(sb)
309 DEFINE_XSTORE(sh)
310 DEFINE_XSTORE(sw)
311 DEFINE_XSTORE(sd)
312
313 DEFINE_XAMO(amoadd_w)
314 DEFINE_XAMO(amoswap_w)
315 DEFINE_XAMO(amoand_w)
316 DEFINE_XAMO(amoor_w)
317 DEFINE_XAMO(amoxor_w)
318 DEFINE_XAMO(amomin_w)
319 DEFINE_XAMO(amomax_w)
320 DEFINE_XAMO(amominu_w)
321 DEFINE_XAMO(amomaxu_w)
322 DEFINE_XAMO(amoadd_d)
323 DEFINE_XAMO(amoswap_d)
324 DEFINE_XAMO(amoand_d)
325 DEFINE_XAMO(amoor_d)
326 DEFINE_XAMO(amoxor_d)
327 DEFINE_XAMO(amomin_d)
328 DEFINE_XAMO(amomax_d)
329 DEFINE_XAMO(amominu_d)
330 DEFINE_XAMO(amomaxu_d)
331
332 DEFINE_XAMO(lr_w)
333 DEFINE_XAMO(sc_w)
334 DEFINE_XAMO(lr_d)
335 DEFINE_XAMO(sc_d)
336
337 DEFINE_FLOAD(flw)
338 DEFINE_FLOAD(fld)
339 DEFINE_FLOAD(flq)
340
341 DEFINE_FSTORE(fsw)
342 DEFINE_FSTORE(fsd)
343 DEFINE_FSTORE(fsq)
344
345 add_insn(new disasm_insn_t("j", match_jal, mask_jal | mask_rd, {&jump_target}));
346 add_insn(new disasm_insn_t("jal", match_jal | match_rd_ra, mask_jal | mask_rd, {&jump_target}));
347 add_insn(new disasm_insn_t("jal", match_jal, mask_jal, {&xrd, &jump_target}));
348
349 DEFINE_B1TYPE("beqz", beq);
350 DEFINE_B1TYPE("bnez", bne);
351 DEFINE_B1TYPE("bltz", blt);
352 DEFINE_B1TYPE("bgez", bge);
353 DEFINE_BTYPE(beq)
354 DEFINE_BTYPE(bne)
355 DEFINE_BTYPE(blt)
356 DEFINE_BTYPE(bge)
357 DEFINE_BTYPE(bltu)
358 DEFINE_BTYPE(bgeu)
359
360 DEFINE_LTYPE(lui);
361 DEFINE_LTYPE(auipc);
362
363 add_insn(new disasm_insn_t("ret", match_jalr | match_rs1_ra, mask_jalr | mask_rd | mask_rs1 | mask_imm, {}));
364 DEFINE_I2TYPE("jr", jalr);
365 add_insn(new disasm_insn_t("jalr", match_jalr | match_rd_ra, mask_jalr | mask_rd | mask_imm, {&xrs1}));
366 DEFINE_ITYPE(jalr);
367
368 add_insn(new disasm_insn_t("nop", match_addi, mask_addi | mask_rd | mask_rs1 | mask_imm, {}));
369 add_insn(new disasm_insn_t(" - ", match_xor, mask_xor | mask_rd | mask_rs1 | mask_rs2, {})); // for machine-generated bubbles
370 DEFINE_I0TYPE("li", addi);
371 DEFINE_I1TYPE("mv", addi);
372 DEFINE_ITYPE(addi);
373 DEFINE_ITYPE(slli);
374 DEFINE_ITYPE(slti);
375 add_insn(new disasm_insn_t("seqz", match_sltiu | match_imm_1, mask_sltiu | mask_imm, {&xrd, &xrs1}));
376 DEFINE_ITYPE(sltiu);
377 add_insn(new disasm_insn_t("not", match_xori | mask_imm, mask_xori | mask_imm, {&xrd, &xrs1}));
378 DEFINE_ITYPE(xori);
379 DEFINE_ITYPE(srli);
380 DEFINE_ITYPE(srai);
381 DEFINE_ITYPE(ori);
382 DEFINE_ITYPE(andi);
383 DEFINE_I1TYPE("sext.w", addiw);
384 DEFINE_ITYPE(addiw);
385 DEFINE_ITYPE(slliw);
386 DEFINE_ITYPE(srliw);
387 DEFINE_ITYPE(sraiw);
388
389 DEFINE_RTYPE(add);
390 DEFINE_RTYPE(sub);
391 DEFINE_RTYPE(sll);
392 DEFINE_RTYPE(slt);
393 add_insn(new disasm_insn_t("snez", match_sltu, mask_sltu | mask_rs1, {&xrd, &xrs2}));
394 DEFINE_RTYPE(sltu);
395 DEFINE_RTYPE(xor);
396 DEFINE_RTYPE(srl);
397 DEFINE_RTYPE(sra);
398 DEFINE_RTYPE(or);
399 DEFINE_RTYPE(and);
400 DEFINE_RTYPE(mul);
401 DEFINE_RTYPE(mulh);
402 DEFINE_RTYPE(mulhu);
403 DEFINE_RTYPE(mulhsu);
404 DEFINE_RTYPE(div);
405 DEFINE_RTYPE(divu);
406 DEFINE_RTYPE(rem);
407 DEFINE_RTYPE(remu);
408 DEFINE_RTYPE(addw);
409 DEFINE_RTYPE(subw);
410 DEFINE_RTYPE(sllw);
411 DEFINE_RTYPE(srlw);
412 DEFINE_RTYPE(sraw);
413 DEFINE_RTYPE(mulw);
414 DEFINE_RTYPE(divw);
415 DEFINE_RTYPE(divuw);
416 DEFINE_RTYPE(remw);
417 DEFINE_RTYPE(remuw);
418
419 DEFINE_NOARG(ecall);
420 DEFINE_NOARG(ebreak);
421 DEFINE_NOARG(uret);
422 DEFINE_NOARG(sret);
423 DEFINE_NOARG(mret);
424 DEFINE_NOARG(fence);
425 DEFINE_NOARG(fence_i);
426
427 add_insn(new disasm_insn_t("csrr", match_csrrs, mask_csrrs | mask_rs1, {&xrd, &csr}));
428 add_insn(new disasm_insn_t("csrw", match_csrrw, mask_csrrw | mask_rd, {&csr, &xrs1}));
429 add_insn(new disasm_insn_t("csrs", match_csrrs, mask_csrrs | mask_rd, {&csr, &xrs1}));
430 add_insn(new disasm_insn_t("csrc", match_csrrc, mask_csrrc | mask_rd, {&csr, &xrs1}));
431 add_insn(new disasm_insn_t("csrwi", match_csrrwi, mask_csrrwi | mask_rd, {&csr, &zimm5}));
432 add_insn(new disasm_insn_t("csrsi", match_csrrsi, mask_csrrsi | mask_rd, {&csr, &zimm5}));
433 add_insn(new disasm_insn_t("csrci", match_csrrci, mask_csrrci | mask_rd, {&csr, &zimm5}));
434 add_insn(new disasm_insn_t("csrrw", match_csrrw, mask_csrrw, {&xrd, &csr, &xrs1}));
435 add_insn(new disasm_insn_t("csrrs", match_csrrs, mask_csrrs, {&xrd, &csr, &xrs1}));
436 add_insn(new disasm_insn_t("csrrc", match_csrrc, mask_csrrc, {&xrd, &csr, &xrs1}));
437 add_insn(new disasm_insn_t("csrrwi", match_csrrwi, mask_csrrwi, {&xrd, &csr, &zimm5}));
438 add_insn(new disasm_insn_t("csrrsi", match_csrrsi, mask_csrrsi, {&xrd, &csr, &zimm5}));
439 add_insn(new disasm_insn_t("csrrci", match_csrrci, mask_csrrci, {&xrd, &csr, &zimm5}));
440
441 DEFINE_FRTYPE(fadd_s);
442 DEFINE_FRTYPE(fsub_s);
443 DEFINE_FRTYPE(fmul_s);
444 DEFINE_FRTYPE(fdiv_s);
445 DEFINE_FR1TYPE(fsqrt_s);
446 DEFINE_FRTYPE(fmin_s);
447 DEFINE_FRTYPE(fmax_s);
448 DEFINE_FR3TYPE(fmadd_s);
449 DEFINE_FR3TYPE(fmsub_s);
450 DEFINE_FR3TYPE(fnmadd_s);
451 DEFINE_FR3TYPE(fnmsub_s);
452 DEFINE_FRTYPE(fsgnj_s);
453 DEFINE_FRTYPE(fsgnjn_s);
454 DEFINE_FRTYPE(fsgnjx_s);
455 DEFINE_FR1TYPE(fcvt_s_d);
456 DEFINE_FR1TYPE(fcvt_s_q);
457 DEFINE_XFTYPE(fcvt_s_l);
458 DEFINE_XFTYPE(fcvt_s_lu);
459 DEFINE_XFTYPE(fcvt_s_w);
460 DEFINE_XFTYPE(fcvt_s_wu);
461 DEFINE_XFTYPE(fcvt_s_wu);
462 DEFINE_XFTYPE(fmv_w_x);
463 DEFINE_FXTYPE(fcvt_l_s);
464 DEFINE_FXTYPE(fcvt_lu_s);
465 DEFINE_FXTYPE(fcvt_w_s);
466 DEFINE_FXTYPE(fcvt_wu_s);
467 DEFINE_FXTYPE(fclass_s);
468 DEFINE_FXTYPE(fmv_x_w);
469 DEFINE_FXTYPE(feq_s);
470 DEFINE_FXTYPE(flt_s);
471 DEFINE_FXTYPE(fle_s);
472
473 DEFINE_FRTYPE(fadd_d);
474 DEFINE_FRTYPE(fsub_d);
475 DEFINE_FRTYPE(fmul_d);
476 DEFINE_FRTYPE(fdiv_d);
477 DEFINE_FR1TYPE(fsqrt_d);
478 DEFINE_FRTYPE(fmin_d);
479 DEFINE_FRTYPE(fmax_d);
480 DEFINE_FR3TYPE(fmadd_d);
481 DEFINE_FR3TYPE(fmsub_d);
482 DEFINE_FR3TYPE(fnmadd_d);
483 DEFINE_FR3TYPE(fnmsub_d);
484 DEFINE_FRTYPE(fsgnj_d);
485 DEFINE_FRTYPE(fsgnjn_d);
486 DEFINE_FRTYPE(fsgnjx_d);
487 DEFINE_FR1TYPE(fcvt_d_s);
488 DEFINE_FR1TYPE(fcvt_d_q);
489 DEFINE_XFTYPE(fcvt_d_l);
490 DEFINE_XFTYPE(fcvt_d_lu);
491 DEFINE_XFTYPE(fcvt_d_w);
492 DEFINE_XFTYPE(fcvt_d_wu);
493 DEFINE_XFTYPE(fcvt_d_wu);
494 DEFINE_XFTYPE(fmv_d_x);
495 DEFINE_FXTYPE(fcvt_l_d);
496 DEFINE_FXTYPE(fcvt_lu_d);
497 DEFINE_FXTYPE(fcvt_w_d);
498 DEFINE_FXTYPE(fcvt_wu_d);
499 DEFINE_FXTYPE(fclass_d);
500 DEFINE_FXTYPE(fmv_x_d);
501 DEFINE_FXTYPE(feq_d);
502 DEFINE_FXTYPE(flt_d);
503 DEFINE_FXTYPE(fle_d);
504
505 DEFINE_FRTYPE(fadd_q);
506 DEFINE_FRTYPE(fsub_q);
507 DEFINE_FRTYPE(fmul_q);
508 DEFINE_FRTYPE(fdiv_q);
509 DEFINE_FR1TYPE(fsqrt_q);
510 DEFINE_FRTYPE(fmin_q);
511 DEFINE_FRTYPE(fmax_q);
512 DEFINE_FR3TYPE(fmadd_q);
513 DEFINE_FR3TYPE(fmsub_q);
514 DEFINE_FR3TYPE(fnmadd_q);
515 DEFINE_FR3TYPE(fnmsub_q);
516 DEFINE_FRTYPE(fsgnj_q);
517 DEFINE_FRTYPE(fsgnjn_q);
518 DEFINE_FRTYPE(fsgnjx_q);
519 DEFINE_FR1TYPE(fcvt_q_s);
520 DEFINE_FR1TYPE(fcvt_q_d);
521 DEFINE_XFTYPE(fcvt_q_l);
522 DEFINE_XFTYPE(fcvt_q_lu);
523 DEFINE_XFTYPE(fcvt_q_w);
524 DEFINE_XFTYPE(fcvt_q_wu);
525 DEFINE_XFTYPE(fcvt_q_wu);
526 DEFINE_XFTYPE(fmv_q_x);
527 DEFINE_FXTYPE(fcvt_l_q);
528 DEFINE_FXTYPE(fcvt_lu_q);
529 DEFINE_FXTYPE(fcvt_w_q);
530 DEFINE_FXTYPE(fcvt_wu_q);
531 DEFINE_FXTYPE(fclass_q);
532 DEFINE_FXTYPE(fmv_x_q);
533 DEFINE_FXTYPE(feq_q);
534 DEFINE_FXTYPE(flt_q);
535 DEFINE_FXTYPE(fle_q);
536
537 DISASM_INSN("ebreak", c_add, mask_rd | mask_rvc_rs2, {});
538 add_insn(new disasm_insn_t("ret", match_c_jr | match_rd_ra, mask_c_jr | mask_rd | mask_rvc_imm, {}));
539 DISASM_INSN("jr", c_jr, mask_rvc_imm, {&rvc_rs1});
540 DISASM_INSN("jalr", c_jalr, mask_rvc_imm, {&rvc_rs1});
541 DISASM_INSN("nop", c_addi, mask_rd | mask_rvc_imm, {});
542 DISASM_INSN("addi", c_addi16sp, mask_rd, {&rvc_sp, &rvc_sp, &rvc_addi16sp_imm});
543 DISASM_INSN("addi", c_addi4spn, 0, {&rvc_rs1s, &rvc_sp, &rvc_addi4spn_imm});
544 DISASM_INSN("li", c_li, 0, {&xrd, &rvc_imm});
545 DISASM_INSN("lui", c_lui, 0, {&xrd, &rvc_uimm});
546 DISASM_INSN("addi", c_addi, 0, {&xrd, &xrd, &rvc_imm});
547 DISASM_INSN("slli", c_slli, 0, {&xrd, &rvc_shamt});
548 DISASM_INSN("mv", c_mv, 0, {&xrd, &rvc_rs2});
549 DISASM_INSN("add", c_add, 0, {&xrd, &xrd, &rvc_rs2});
550 DISASM_INSN("addw", c_addw, 0, {&rvc_rs1s, &rvc_rs1s, &rvc_rs2s});
551 DISASM_INSN("sub", c_sub, 0, {&rvc_rs1s, &rvc_rs1s, &rvc_rs2s});
552 DISASM_INSN("subw", c_subw, 0, {&rvc_rs1s, &rvc_rs1s, &rvc_rs2s});
553 DISASM_INSN("and", c_and, 0, {&rvc_rs1s, &rvc_rs1s, &rvc_rs2s});
554 DISASM_INSN("or", c_or, 0, {&rvc_rs1s, &rvc_rs1s, &rvc_rs2s});
555 DISASM_INSN("xor", c_xor, 0, {&rvc_rs1s, &rvc_rs1s, &rvc_rs2s});
556 DISASM_INSN("lw", c_lwsp, 0, {&xrd, &rvc_lwsp_address});
557 DISASM_INSN("fld", c_fld, 0, {&rvc_rs2s, &rvc_ld_address});
558 DISASM_INSN("sw", c_swsp, 0, {&rvc_rs2, &rvc_swsp_address});
559 DISASM_INSN("lw", c_lw, 0, {&rvc_rs2s, &rvc_lw_address});
560 DISASM_INSN("sw", c_sw, 0, {&rvc_rs2s, &rvc_lw_address});
561 DISASM_INSN("beqz", c_beqz, 0, {&rvc_rs1s, &rvc_branch_target});
562 DISASM_INSN("bnez", c_bnez, 0, {&rvc_rs1s, &rvc_branch_target});
563 DISASM_INSN("j", c_j, 0, {&rvc_jump_target});
564
565 if (xlen == 32) {
566 DISASM_INSN("flw", c_flw, 0, {&rvc_rs2s, &rvc_lw_address});
567 DISASM_INSN("flw", c_flwsp, 0, {&xrd, &rvc_lwsp_address});
568 DISASM_INSN("fsw", c_fsw, 0, {&rvc_rs2s, &rvc_lw_address});
569 DISASM_INSN("fsw", c_fswsp, 0, {&rvc_rs2, &rvc_swsp_address});
570 DISASM_INSN("jal", c_jal, 0, {&rvc_jump_target});
571 } else {
572 DISASM_INSN("ld", c_ld, 0, {&rvc_rs2s, &rvc_ld_address});
573 DISASM_INSN("ld", c_ldsp, 0, {&xrd, &rvc_ldsp_address});
574 DISASM_INSN("sd", c_sd, 0, {&rvc_rs2s, &rvc_ld_address});
575 DISASM_INSN("sd", c_sdsp, 0, {&rvc_rs2, &rvc_sdsp_address});
576 DISASM_INSN("addiw", c_addiw, 0, {&xrd, &xrd, &rvc_imm});
577 }
578
579 // provide a default disassembly for all instructions as a fallback
580 #define DECLARE_INSN(code, match, mask) \
581 add_insn(new disasm_insn_t(#code " (args unknown)", match, mask, {}));
582 #include "encoding.h"
583 #undef DECLARE_INSN
584 }
585
586 const disasm_insn_t* disassembler_t::lookup(insn_t insn) const
587 {
588 size_t idx = insn.bits() % HASH_SIZE;
589 for (size_t j = 0; j < chain[idx].size(); j++)
590 if(*chain[idx][j] == insn)
591 return chain[idx][j];
592
593 idx = HASH_SIZE;
594 for (size_t j = 0; j < chain[idx].size(); j++)
595 if(*chain[idx][j] == insn)
596 return chain[idx][j];
597
598 return NULL;
599 }
600
601 void disassembler_t::add_insn(disasm_insn_t* insn)
602 {
603 size_t idx = HASH_SIZE;
604 if (insn->get_mask() % HASH_SIZE == HASH_SIZE - 1)
605 idx = insn->get_match() % HASH_SIZE;
606 chain[idx].push_back(insn);
607 }
608
609 disassembler_t::~disassembler_t()
610 {
611 for (size_t i = 0; i < HASH_SIZE+1; i++)
612 for (size_t j = 0; j < chain[i].size(); j++)
613 delete chain[i][j];
614 }