1 // See LICENSE for license details.
11 struct : public arg_t
{
12 std::string
to_string(insn_t insn
) const {
13 return std::to_string((int)insn
.i_imm()) + '(' + xpr_name
[insn
.rs1()] + ')';
17 struct : public arg_t
{
18 std::string
to_string(insn_t insn
) const {
19 return std::to_string((int)insn
.s_imm()) + '(' + xpr_name
[insn
.rs1()] + ')';
23 struct : public arg_t
{
24 std::string
to_string(insn_t insn
) const {
25 return std::string("0(") + xpr_name
[insn
.rs1()] + ')';
29 struct : public arg_t
{
30 std::string
to_string(insn_t insn
) const {
31 return xpr_name
[insn
.rd()];
35 struct : public arg_t
{
36 std::string
to_string(insn_t insn
) const {
37 return xpr_name
[insn
.rs1()];
41 struct : public arg_t
{
42 std::string
to_string(insn_t insn
) const {
43 return xpr_name
[insn
.rs2()];
47 struct : public arg_t
{
48 std::string
to_string(insn_t insn
) const {
49 return fpr_name
[insn
.rd()];
53 struct : public arg_t
{
54 std::string
to_string(insn_t insn
) const {
55 return fpr_name
[insn
.rs1()];
59 struct : public arg_t
{
60 std::string
to_string(insn_t insn
) const {
61 return fpr_name
[insn
.rs2()];
65 struct : public arg_t
{
66 std::string
to_string(insn_t insn
) const {
67 return fpr_name
[insn
.rs3()];
71 struct : public arg_t
{
72 std::string
to_string(insn_t insn
) const {
75 #define DECLARE_CSR(name, num) case num: return #name;
78 default: return "unknown";
83 struct : public arg_t
{
84 std::string
to_string(insn_t insn
) const {
85 return std::to_string((int)insn
.i_imm());
89 struct : public arg_t
{
90 std::string
to_string(insn_t insn
) const {
92 s
<< std::hex
<< "0x" << ((uint32_t)insn
.u_imm() >> 12);
97 struct : public arg_t
{
98 std::string
to_string(insn_t insn
) const {
99 return std::to_string(insn
.rs1());
103 struct : public arg_t
{
104 std::string
to_string(insn_t insn
) const {
106 int32_t target
= insn
.sb_imm();
107 char sign
= target
>= 0 ? '+' : '-';
108 s
<< "pc " << sign
<< ' ' << abs(target
);
113 struct : public arg_t
{
114 std::string
to_string(insn_t insn
) const {
116 int32_t target
= insn
.uj_imm();
117 char sign
= target
>= 0 ? '+' : '-';
118 s
<< "pc " << sign
<< std::hex
<< " 0x" << abs(target
);
123 std::string
disassembler_t::disassemble(insn_t insn
)
125 const disasm_insn_t
* disasm_insn
= lookup(insn
);
126 return disasm_insn
? disasm_insn
->to_string(insn
) : "unknown";
129 disassembler_t::disassembler_t()
131 const uint32_t mask_rd
= 0x1fUL
<< 7;
132 const uint32_t match_rd_ra
= 1UL << 7;
133 const uint32_t mask_rs1
= 0x1fUL
<< 15;
134 const uint32_t match_rs1_ra
= 1UL << 15;
135 const uint32_t mask_rs2
= 0x1fUL
<< 20;
136 const uint32_t mask_imm
= 0xfffUL
<< 20;
137 const uint32_t match_imm_1
= 1UL << 20;
139 #define DECLARE_INSN(code, match, mask) \
140 const uint32_t match_##code = match; \
141 const uint32_t mask_##code = mask;
142 #include "encoding.h"
145 // explicit per-instruction disassembly
146 #define DISASM_INSN(name, code, extra, ...) \
147 add_insn(new disasm_insn_t(name, match_##code, mask_##code | (extra), __VA_ARGS__));
148 #define DEFINE_NOARG(code) \
149 add_insn(new disasm_insn_t(#code, match_##code, mask_##code, {}));
150 #define DEFINE_RTYPE(code) DISASM_INSN(#code, code, 0, {&xrd, &xrs1, &xrs2})
151 #define DEFINE_ITYPE(code) DISASM_INSN(#code, code, 0, {&xrd, &xrs1, &imm})
152 #define DEFINE_I0TYPE(name, code) DISASM_INSN(name, code, mask_rs1, {&xrd, &imm})
153 #define DEFINE_I1TYPE(name, code) DISASM_INSN(name, code, mask_imm, {&xrd, &xrs1})
154 #define DEFINE_I2TYPE(name, code) DISASM_INSN(name, code, mask_rd | mask_imm, {&xrs1})
155 #define DEFINE_LTYPE(code) DISASM_INSN(#code, code, 0, {&xrd, &bigimm})
156 #define DEFINE_BTYPE(code) DISASM_INSN(#code, code, 0, {&xrs1, &xrs2, &branch_target})
157 #define DEFINE_B0TYPE(name, code) DISASM_INSN(name, code, mask_rs1 | mask_rs2, {&branch_target})
158 #define DEFINE_B1TYPE(name, code) DISASM_INSN(name, code, mask_rs2, {&xrs1, &branch_target})
159 #define DEFINE_XLOAD(code) DISASM_INSN(#code, code, 0, {&xrd, &load_address})
160 #define DEFINE_XSTORE(code) DISASM_INSN(#code, code, 0, {&xrs2, &store_address})
161 #define DEFINE_XAMO(code) DISASM_INSN(#code, code, 0, {&xrd, &xrs2, &amo_address})
162 #define DEFINE_FLOAD(code) DISASM_INSN(#code, code, 0, {&frd, &load_address})
163 #define DEFINE_FSTORE(code) DISASM_INSN(#code, code, 0, {&frs2, &store_address})
164 #define DEFINE_FRTYPE(code) DISASM_INSN(#code, code, 0, {&frd, &frs1, &frs2})
165 #define DEFINE_FR1TYPE(code) DISASM_INSN(#code, code, 0, {&frd, &frs1})
166 #define DEFINE_FR3TYPE(code) DISASM_INSN(#code, code, 0, {&frd, &frs1, &frs2, &frs3})
167 #define DEFINE_FXTYPE(code) DISASM_INSN(#code, code, 0, {&xrd, &frs1})
168 #define DEFINE_XFTYPE(code) DISASM_INSN(#code, code, 0, {&frd, &xrs1})
183 DEFINE_XAMO(amoadd_w
)
184 DEFINE_XAMO(amoswap_w
)
185 DEFINE_XAMO(amoand_w
)
187 DEFINE_XAMO(amoxor_w
)
188 DEFINE_XAMO(amomin_w
)
189 DEFINE_XAMO(amomax_w
)
190 DEFINE_XAMO(amominu_w
)
191 DEFINE_XAMO(amomaxu_w
)
192 DEFINE_XAMO(amoadd_d
)
193 DEFINE_XAMO(amoswap_d
)
194 DEFINE_XAMO(amoand_d
)
196 DEFINE_XAMO(amoxor_d
)
197 DEFINE_XAMO(amomin_d
)
198 DEFINE_XAMO(amomax_d
)
199 DEFINE_XAMO(amominu_d
)
200 DEFINE_XAMO(amomaxu_d
)
213 add_insn(new disasm_insn_t("j", match_jal
, mask_jal
| mask_rd
, {&jump_target
}));
214 add_insn(new disasm_insn_t("jal", match_jal
| match_rd_ra
, mask_jal
| mask_rd
, {&jump_target
}));
215 add_insn(new disasm_insn_t("jal", match_jal
, mask_jal
, {&xrd
, &jump_target
}));
217 DEFINE_B1TYPE("beqz", beq
);
218 DEFINE_B1TYPE("bnez", bne
);
219 DEFINE_B1TYPE("bltz", blt
);
220 DEFINE_B1TYPE("bgez", bge
);
231 add_insn(new disasm_insn_t("ret", match_jalr
| match_rs1_ra
, mask_jalr
| mask_rd
| mask_rs1
| mask_imm
, {}));
232 DEFINE_I2TYPE("jr", jalr
);
233 add_insn(new disasm_insn_t("jalr", match_jalr
| match_rd_ra
, mask_jalr
| mask_rd
| mask_imm
, {&xrs1
}));
236 add_insn(new disasm_insn_t("nop", match_addi
, mask_addi
| mask_rd
| mask_rs1
| mask_imm
, {}));
237 add_insn(new disasm_insn_t(" - ", match_xor
, mask_xor
| mask_rd
| mask_rs1
| mask_rs2
, {})); // for machine-generated bubbles
238 DEFINE_I0TYPE("li", addi
);
239 DEFINE_I1TYPE("mv", addi
);
243 add_insn(new disasm_insn_t("seqz", match_sltiu
| match_imm_1
, mask_sltiu
| mask_imm
, {&xrd
, &xrs1
}));
245 add_insn(new disasm_insn_t("not", match_xori
| mask_imm
, mask_xori
| mask_imm
, {&xrd
, &xrs1
}));
251 DEFINE_I1TYPE("sext.w", addiw
);
261 add_insn(new disasm_insn_t("snez", match_sltu
, mask_sltu
| mask_rs1
, {&xrd
, &xrs2
}));
271 DEFINE_RTYPE(mulhsu
);
288 DEFINE_NOARG(sbreak
);
290 DEFINE_NOARG(fence_i
);
292 add_insn(new disasm_insn_t("csrr", match_csrrs
, mask_csrrs
| mask_rs1
, {&xrd
, &csr
}));
293 add_insn(new disasm_insn_t("csrw", match_csrrw
, mask_csrrw
| mask_rd
, {&csr
, &xrs1
}));
294 add_insn(new disasm_insn_t("csrs", match_csrrs
, mask_csrrs
| mask_rd
, {&csr
, &xrs1
}));
295 add_insn(new disasm_insn_t("csrc", match_csrrc
, mask_csrrc
| mask_rd
, {&csr
, &xrs1
}));
296 add_insn(new disasm_insn_t("csrwi", match_csrrwi
, mask_csrrwi
| mask_rd
, {&csr
, &zimm5
}));
297 add_insn(new disasm_insn_t("csrsi", match_csrrsi
, mask_csrrsi
| mask_rd
, {&csr
, &zimm5
}));
298 add_insn(new disasm_insn_t("csrci", match_csrrci
, mask_csrrci
| mask_rd
, {&csr
, &zimm5
}));
299 add_insn(new disasm_insn_t("csrrw", match_csrrw
, mask_csrrw
, {&xrd
, &csr
, &xrs1
}));
300 add_insn(new disasm_insn_t("csrrs", match_csrrs
, mask_csrrs
, {&xrd
, &csr
, &xrs1
}));
301 add_insn(new disasm_insn_t("csrrc", match_csrrc
, mask_csrrc
, {&xrd
, &csr
, &xrs1
}));
302 add_insn(new disasm_insn_t("csrrwi", match_csrrwi
, mask_csrrwi
, {&xrd
, &csr
, &zimm5
}));
303 add_insn(new disasm_insn_t("csrrsi", match_csrrsi
, mask_csrrsi
, {&xrd
, &csr
, &zimm5
}));
304 add_insn(new disasm_insn_t("csrrci", match_csrrci
, mask_csrrci
, {&xrd
, &csr
, &zimm5
}));
307 DEFINE_FRTYPE(fadd_s
);
308 DEFINE_FRTYPE(fsub_s
);
309 DEFINE_FRTYPE(fmul_s
);
310 DEFINE_FRTYPE(fdiv_s
);
311 DEFINE_FR1TYPE(fsqrt_s
);
312 DEFINE_FRTYPE(fmin_s
);
313 DEFINE_FRTYPE(fmax_s
);
314 DEFINE_FR3TYPE(fmadd_s
);
315 DEFINE_FR3TYPE(fmsub_s
);
316 DEFINE_FR3TYPE(fnmadd_s
);
317 DEFINE_FR3TYPE(fnmsub_s
);
318 DEFINE_FRTYPE(fsgnj_s
);
319 DEFINE_FRTYPE(fsgnjn_s
);
320 DEFINE_FRTYPE(fsgnjx_s
);
321 DEFINE_FR1TYPE(fcvt_s_d
);
322 DEFINE_XFTYPE(fcvt_s_l
);
323 DEFINE_XFTYPE(fcvt_s_lu
);
324 DEFINE_XFTYPE(fcvt_s_w
);
325 DEFINE_XFTYPE(fcvt_s_wu
);
326 DEFINE_XFTYPE(fcvt_s_wu
);
327 DEFINE_XFTYPE(fmv_s_x
);
328 DEFINE_FXTYPE(fcvt_l_s
);
329 DEFINE_FXTYPE(fcvt_lu_s
);
330 DEFINE_FXTYPE(fcvt_w_s
);
331 DEFINE_FXTYPE(fcvt_wu_s
);
332 DEFINE_FXTYPE(fclass_s
);
333 DEFINE_FXTYPE(fmv_x_s
);
334 DEFINE_FXTYPE(feq_s
);
335 DEFINE_FXTYPE(flt_s
);
336 DEFINE_FXTYPE(fle_s
);
338 DEFINE_FRTYPE(fadd_d
);
339 DEFINE_FRTYPE(fsub_d
);
340 DEFINE_FRTYPE(fmul_d
);
341 DEFINE_FRTYPE(fdiv_d
);
342 DEFINE_FR1TYPE(fsqrt_d
);
343 DEFINE_FRTYPE(fmin_d
);
344 DEFINE_FRTYPE(fmax_d
);
345 DEFINE_FR3TYPE(fmadd_d
);
346 DEFINE_FR3TYPE(fmsub_d
);
347 DEFINE_FR3TYPE(fnmadd_d
);
348 DEFINE_FR3TYPE(fnmsub_d
);
349 DEFINE_FRTYPE(fsgnj_d
);
350 DEFINE_FRTYPE(fsgnjn_d
);
351 DEFINE_FRTYPE(fsgnjx_d
);
352 DEFINE_FR1TYPE(fcvt_d_s
);
353 DEFINE_XFTYPE(fcvt_d_l
);
354 DEFINE_XFTYPE(fcvt_d_lu
);
355 DEFINE_XFTYPE(fcvt_d_w
);
356 DEFINE_XFTYPE(fcvt_d_wu
);
357 DEFINE_XFTYPE(fcvt_d_wu
);
358 DEFINE_XFTYPE(fmv_d_x
);
359 DEFINE_FXTYPE(fcvt_l_d
);
360 DEFINE_FXTYPE(fcvt_lu_d
);
361 DEFINE_FXTYPE(fcvt_w_d
);
362 DEFINE_FXTYPE(fcvt_wu_d
);
363 DEFINE_FXTYPE(fclass_d
);
364 DEFINE_FXTYPE(fmv_x_d
);
365 DEFINE_FXTYPE(feq_d
);
366 DEFINE_FXTYPE(flt_d
);
367 DEFINE_FXTYPE(fle_d
);
369 // provide a default disassembly for all instructions as a fallback
370 #define DECLARE_INSN(code, match, mask) \
371 add_insn(new disasm_insn_t(#code " (args unknown)", match, mask, {}));
372 #include "encoding.h"
376 const disasm_insn_t
* disassembler_t::lookup(insn_t insn
)
378 size_t idx
= insn
.bits() % HASH_SIZE
;
379 for (size_t j
= 0; j
< chain
[idx
].size(); j
++)
380 if(*chain
[idx
][j
] == insn
)
381 return chain
[idx
][j
];
384 for (size_t j
= 0; j
< chain
[idx
].size(); j
++)
385 if(*chain
[idx
][j
] == insn
)
386 return chain
[idx
][j
];
391 void disassembler_t::add_insn(disasm_insn_t
* insn
)
393 size_t idx
= HASH_SIZE
;
394 if (insn
->get_mask() % HASH_SIZE
== HASH_SIZE
- 1)
395 idx
= insn
->get_match() % HASH_SIZE
;
396 chain
[idx
].push_back(insn
);
399 disassembler_t::~disassembler_t()
401 for (size_t i
= 0; i
< HASH_SIZE
+1; i
++)
402 for (size_t j
= 0; j
< chain
[i
].size(); j
++)