spike_main/spike.cc

   1 // See LICENSE for license details.
   2
   3 #include "sim.h"
   4 #include "mmu.h"
   5 #include "remote_bitbang.h"
   6 #include "cachesim.h"
   7 #include "extension.h"
   8 #include <dlfcn.h>
   9 #include <fesvr/option_parser.h>
  10 #include <stdio.h>
  11 #include <stdlib.h>
  12 #include <vector>
  13 #include <string>
  14 #include <memory>
  15
  16 static void help()
  17 {
  18   fprintf(stderr, "usage: spike [host options] <target program> [target options]\n");
  19   fprintf(stderr, "Host Options:\n");
  20   fprintf(stderr, "  -p<n>                 Simulate <n> processors [default 1]\n");
  21   fprintf(stderr, "  -m<n>                 Provide <n> MiB of target memory [default 2048]\n");
  22   fprintf(stderr, "  -m<a:m,b:n,...>       Provide memory regions of size m and n bytes\n");
  23   fprintf(stderr, "                          at base addresses a and b (with 4 KiB alignment)\n");
  24   fprintf(stderr, "  -d                    Interactive debug mode\n");
  25   fprintf(stderr, "  -g                    Track histogram of PCs\n");
  26   fprintf(stderr, "  -l                    Generate a log of execution\n");
  27   fprintf(stderr, "  -h                    Print this help message\n");
  28   fprintf(stderr, "  -H                 Start halted, allowing a debugger to connect\n");
  29   fprintf(stderr, "  --isa=<name>          RISC-V ISA string [default %s]\n", DEFAULT_ISA);
  30   fprintf(stderr, "  --pc=<address>        Override ELF entry point\n");
  31   fprintf(stderr, "  --ic=<S>:<W>:<B>      Instantiate a cache model with S sets,\n");
  32   fprintf(stderr, "  --dc=<S>:<W>:<B>        W ways, and B-byte blocks (with S and\n");
  33   fprintf(stderr, "  --l2=<S>:<W>:<B>        B both powers of 2).\n");
  34   fprintf(stderr, "  --extension=<name>    Specify RoCC Extension\n");
  35   fprintf(stderr, "  --extlib=<name>       Shared library to load\n");
  36   fprintf(stderr, "  --rbb-port=<port>     Listen on <port> for remote bitbang connection\n");
  37   fprintf(stderr, "  --dump-dts  Print device tree string and exit\n");
  38   exit(1);
  39 }
  40
  41 static std::vector<std::pair<reg_t, mem_t*>> make_mems(const char* arg)
  42 {
  43   // handle legacy mem argument
  44   char* p;
  45   auto mb = strtoull(arg, &p, 0);
  46   if (*p == 0) {
  47     reg_t size = reg_t(mb) << 20;
  48     return std::vector<std::pair<reg_t, mem_t*>>(1, std::make_pair(reg_t(DRAM_BASE), new mem_t(size)));
  49   }
  50
  51   // handle base/size tuples
  52   std::vector<std::pair<reg_t, mem_t*>> res;
  53   while (true) {
  54     auto base = strtoull(arg, &p, 0);
  55     if (!*p || *p != ':')
  56       help();
  57     auto size = strtoull(p + 1, &p, 0);
  58     if ((size | base) % PGSIZE != 0)
  59       help();
  60     res.push_back(std::make_pair(reg_t(base), new mem_t(size)));
  61     if (!*p)
  62       break;
  63     if (*p != ',')
  64       help();
  65     arg = p + 1;
  66   }
  67   return res;
  68 }
  69
  70 int main(int argc, char** argv)
  71 {
  72   bool debug = false;
  73   bool halted = false;
  74   bool histogram = false;
  75   bool log = false;
  76   bool dump_dts = false;
  77   size_t nprocs = 1;
  78   reg_t start_pc = reg_t(-1);
  79   std::vector<std::pair<reg_t, mem_t*>> mems;
  80   std::unique_ptr<icache_sim_t> ic;
  81   std::unique_ptr<dcache_sim_t> dc;
  82   std::unique_ptr<cache_sim_t> l2;
  83   std::function<extension_t*()> extension;
  84   const char* isa = DEFAULT_ISA;
  85   uint16_t rbb_port = 0;
  86   bool use_rbb = false;
  87
  88   option_parser_t parser;
  89   parser.help(&help);
  90   parser.option('h', 0, 0, [&](const char* s){help();});
  91   parser.option('d', 0, 0, [&](const char* s){debug = true;});
  92   parser.option('g', 0, 0, [&](const char* s){histogram = true;});
  93   parser.option('l', 0, 0, [&](const char* s){log = true;});
  94   parser.option('p', 0, 1, [&](const char* s){nprocs = atoi(s);});
  95   parser.option('m', 0, 1, [&](const char* s){mems = make_mems(s);});
  96   // I wanted to use --halted, but for some reason that doesn't work.
  97   parser.option('H', 0, 0, [&](const char* s){halted = true;});
  98   parser.option(0, "rbb-port", 1, [&](const char* s){use_rbb = true; rbb_port = atoi(s);});
  99   parser.option(0, "pc", 1, [&](const char* s){start_pc = strtoull(s, 0, 0);});
 100   parser.option(0, "ic", 1, [&](const char* s){ic.reset(new icache_sim_t(s));});
 101   parser.option(0, "dc", 1, [&](const char* s){dc.reset(new dcache_sim_t(s));});
 102   parser.option(0, "l2", 1, [&](const char* s){l2.reset(cache_sim_t::construct(s, "L2$"));});
 103   parser.option(0, "isa", 1, [&](const char* s){isa = s;});
 104   parser.option(0, "extension", 1, [&](const char* s){extension = find_extension(s);});
 105   parser.option(0, "dump-dts", 0, [&](const char *s){dump_dts = true;});
 106   parser.option(0, "extlib", 1, [&](const char *s){
 107     void *lib = dlopen(s, RTLD_NOW | RTLD_GLOBAL);
 108     if (lib == NULL) {
 109       fprintf(stderr, "Unable to load extlib '%s': %s\n", s, dlerror());
 110       exit(-1);
 111     }
 112   });
 113
 114   auto argv1 = parser.parse(argv);
 115   std::vector<std::string> htif_args(argv1, (const char*const*)argv + argc);
 116   if (mems.empty())
 117     mems = make_mems("2048");
 118
 119   sim_t s(isa, nprocs, halted, start_pc, mems, htif_args);
 120   std::unique_ptr<remote_bitbang_t> remote_bitbang((remote_bitbang_t *) NULL);
 121   std::unique_ptr<jtag_dtm_t> jtag_dtm(new jtag_dtm_t(&s.debug_module));
 122   if (use_rbb) {
 123     remote_bitbang.reset(new remote_bitbang_t(rbb_port, &(*jtag_dtm)));
 124     s.set_remote_bitbang(&(*remote_bitbang));
 125   }
 126
 127   if (dump_dts) {
 128     printf("%s", s.get_dts());
 129     return 0;
 130   }
 131
 132   if (!*argv1)
 133     help();
 134
 135   if (ic && l2) ic->set_miss_handler(&*l2);
 136   if (dc && l2) dc->set_miss_handler(&*l2);
 137   for (size_t i = 0; i < nprocs; i++)
 138   {
 139     if (ic) s.get_core(i)->get_mmu()->register_memtracer(&*ic);
 140     if (dc) s.get_core(i)->get_mmu()->register_memtracer(&*dc);
 141     if (extension) s.get_core(i)->register_extension(extension());
 142   }
 143
 144   s.set_debug(debug);
 145   s.set_log(log);
 146   s.set_histogram(histogram);
 147   return s.run();
 148 }