spike_main/spike.cc

   1 // See LICENSE for license details.
   2
   3 #include "sim.h"
   4 #include "mmu.h"
   5 #include "gdbserver.h"
   6 #include "cachesim.h"
   7 #include "extension.h"
   8 #include <dlfcn.h>
   9 #include <fesvr/option_parser.h>
  10 #include <stdio.h>
  11 #include <stdlib.h>
  12 #include <vector>
  13 #include <string>
  14 #include <memory>
  15
  16 static void help()
  17 {
  18   fprintf(stderr, "usage: spike [host options] <target program> [target options]\n");
  19   fprintf(stderr, "Host Options:\n");
  20   fprintf(stderr, "  -p<n>                 Simulate <n> processors [default 1]\n");
  21   fprintf(stderr, "  -m<n>                 Provide <n> MiB of target memory [default 2048]\n");
  22   fprintf(stderr, "  -m<a:m,b:n,...>       Provide memory regions of size m and n bytes\n");
  23   fprintf(stderr, "                          at base addresses a and b (with 4 KiB alignment)\n");
  24   fprintf(stderr, "  -d                    Interactive debug mode\n");
  25   fprintf(stderr, "  -g                    Track histogram of PCs\n");
  26   fprintf(stderr, "  -l                    Generate a log of execution\n");
  27   fprintf(stderr, "  -h                    Print this help message\n");
  28   fprintf(stderr, "  -H                 Start halted, allowing a debugger to connect\n");
  29   fprintf(stderr, "  --isa=<name>          RISC-V ISA string [default %s]\n", DEFAULT_ISA);
  30   fprintf(stderr, "  --ic=<S>:<W>:<B>      Instantiate a cache model with S sets,\n");
  31   fprintf(stderr, "  --dc=<S>:<W>:<B>        W ways, and B-byte blocks (with S and\n");
  32   fprintf(stderr, "  --l2=<S>:<W>:<B>        B both powers of 2).\n");
  33   fprintf(stderr, "  --extension=<name>    Specify RoCC Extension\n");
  34   fprintf(stderr, "  --extlib=<name>       Shared library to load\n");
  35   fprintf(stderr, "  --gdb-port=<port>  Listen on <port> for gdb to connect\n");
  36   fprintf(stderr, "  --dump-dts  Print device tree string and exit\n");
  37   exit(1);
  38 }
  39
  40 static std::vector<std::pair<reg_t, mem_t*>> make_mems(const char* arg)
  41 {
  42   // handle legacy mem argument
  43   char* p;
  44   auto mb = strtoull(arg, &p, 0);
  45   if (*p == 0) {
  46     reg_t size = reg_t(mb) << 20;
  47     return std::vector<std::pair<reg_t, mem_t*>>(1, std::make_pair(reg_t(DRAM_BASE), new mem_t(size)));
  48   }
  49
  50   // handle base/size tuples
  51   std::vector<std::pair<reg_t, mem_t*>> res;
  52   while (true) {
  53     auto base = strtoull(arg, &p, 0);
  54     if (!*p || *p != ':')
  55       help();
  56     auto size = strtoull(p + 1, &p, 0);
  57     if ((size | base) % PGSIZE != 0)
  58       help();
  59     res.push_back(std::make_pair(reg_t(base), new mem_t(size)));
  60     if (!*p)
  61       break;
  62     if (*p != ',')
  63       help();
  64     arg = p + 1;
  65   }
  66   return res;
  67 #if 0
  68   // allocate target machine's memory, shrinking it as necessary
  69   // until the allocation succeeds
  70   size_t memsz0 = (size_t)mem_mb << 20;
  71   size_t quantum = 1L << 20;
  72   if (memsz0 == 0)
  73     memsz0 = (size_t)2048 << 20;
  74
  75   memsz = memsz0;
  76   while ((mem = (char*)calloc(1, memsz)) == NULL)
  77     memsz = (size_t)(memsz*0.9)/quantum*quantum;
  78
  79   if (memsz != memsz0)
  80     fprintf(stderr, "warning: only got %zu bytes of target mem (wanted %zu)\n",
  81             memsz, memsz0);
  82 #endif
  83 }
  84
  85 int main(int argc, char** argv)
  86 {
  87   bool debug = false;
  88   bool halted = false;
  89   bool histogram = false;
  90   bool log = false;
  91   bool dump_dts = false;
  92   size_t nprocs = 1;
  93   std::vector<std::pair<reg_t, mem_t*>> mems;
  94   std::unique_ptr<icache_sim_t> ic;
  95   std::unique_ptr<dcache_sim_t> dc;
  96   std::unique_ptr<cache_sim_t> l2;
  97   std::function<extension_t*()> extension;
  98   const char* isa = DEFAULT_ISA;
  99   uint16_t gdb_port = 0;
 100
 101   option_parser_t parser;
 102   parser.help(&help);
 103   parser.option('h', 0, 0, [&](const char* s){help();});
 104   parser.option('d', 0, 0, [&](const char* s){debug = true;});
 105   parser.option('g', 0, 0, [&](const char* s){histogram = true;});
 106   parser.option('l', 0, 0, [&](const char* s){log = true;});
 107   parser.option('p', 0, 1, [&](const char* s){nprocs = atoi(s);});
 108   parser.option('m', 0, 1, [&](const char* s){mems = make_mems(s);});
 109   // I wanted to use --halted, but for some reason that doesn't work.
 110   parser.option('H', 0, 0, [&](const char* s){halted = true;});
 111   parser.option(0, "gdb-port", 1, [&](const char* s){gdb_port = atoi(s);});
 112   parser.option(0, "ic", 1, [&](const char* s){ic.reset(new icache_sim_t(s));});
 113   parser.option(0, "dc", 1, [&](const char* s){dc.reset(new dcache_sim_t(s));});
 114   parser.option(0, "l2", 1, [&](const char* s){l2.reset(cache_sim_t::construct(s, "L2$"));});
 115   parser.option(0, "isa", 1, [&](const char* s){isa = s;});
 116   parser.option(0, "extension", 1, [&](const char* s){extension = find_extension(s);});
 117   parser.option(0, "dump-dts", 0, [&](const char *s){dump_dts = true;});
 118   parser.option(0, "extlib", 1, [&](const char *s){
 119     void *lib = dlopen(s, RTLD_NOW | RTLD_GLOBAL);
 120     if (lib == NULL) {
 121       fprintf(stderr, "Unable to load extlib '%s': %s\n", s, dlerror());
 122       exit(-1);
 123     }
 124   });
 125
 126   auto argv1 = parser.parse(argv);
 127   std::vector<std::string> htif_args(argv1, (const char*const*)argv + argc);
 128   if (mems.empty())
 129     mems = make_mems("2048");
 130
 131   sim_t s(isa, nprocs, halted, mems, htif_args);
 132   std::unique_ptr<gdbserver_t> gdbserver;
 133   if (gdb_port) {
 134     gdbserver = std::unique_ptr<gdbserver_t>(new gdbserver_t(gdb_port, &s));
 135     s.set_gdbserver(&(*gdbserver));
 136   }
 137
 138   if (dump_dts) {
 139     printf("%s", s.get_dts());
 140     return 0;
 141   }
 142
 143   if (!*argv1)
 144     help();
 145
 146   if (ic && l2) ic->set_miss_handler(&*l2);
 147   if (dc && l2) dc->set_miss_handler(&*l2);
 148   for (size_t i = 0; i < nprocs; i++)
 149   {
 150     if (ic) s.get_core(i)->get_mmu()->register_memtracer(&*ic);
 151     if (dc) s.get_core(i)->get_mmu()->register_memtracer(&*dc);
 152     if (extension) s.get_core(i)->register_extension(extension());
 153   }
 154
 155   s.set_debug(debug);
 156   s.set_log(log);
 157   s.set_histogram(histogram);
 158   return s.run();
 159 }