Update bits to latest spec.

[riscv-isa-sim.git] / riscv / debug_module.h

diff --git a/riscv/debug_module.h b/riscv/debug_module.h
index e881776ebcd30d39c684e96f3028dbb99618d8ae..eaaf06e9fab79a4f72d5eba2ca4764e9e51053ca 100644 (file)
--- a/riscv/debug_module.h
+++ b/riscv/debug_module.h
@@ -11,8 +11,6 @@ class sim_t;
 typedef struct {
   bool haltreq;
   bool resumereq;
-  bool reset;
-  bool dmactive;
   enum {
     HARTSTATUS_HALTED,
     HARTSTATUS_RUNNING,
@@ -20,13 +18,11 @@ typedef struct {
     HARTSTATUS_NOTEXIST
   } hartstatus;
   unsigned hartsel;
+  bool hartreset;
+  bool dmactive;
+  bool reset;
   bool authenticated;
   bool authbusy;
-  enum {
-    AUTHTYPE_NOAUTH,
-    AUTHTYPE_PASSWORD,
-    AUTHTYPE_CHALLENGE
-  } authtype;
   unsigned version;
 } dmcontrol_t;