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Narrow the interface used by the processors and memory to the top-level simulator...
author
Prashanth Mundkur
<prashanth.mundkur@gmail.com>
Tue, 20 Feb 2018 23:16:53 +0000
(15:16 -0800)
committer
Andrew Waterman
<aswaterman@gmail.com>
Tue, 6 Mar 2018 18:07:03 +0000
(12:07 -0600)
This allows the implementation of an alternative top-level simulator class.
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projects / riscv-isa-sim.git / commitdiff