debug: Checkpoint which somewhat works with OpenOCD v13, but still has some bugs.

diff --git a/debug_rom/debug_rom_defines.h b/debug_rom/debug_rom_defines.h
index 074107ceb8ce203c4da8b96a51616072f68e8647..616cf59045fc066e4bfb683050ca1ccfd32ada98 100644 (file)
--- a/debug_rom/debug_rom_defines.h
+++ b/debug_rom/debug_rom_defines.h
@@ -18,5 +18,6 @@
 // These needs to match the link.ld         
 #define DEBUG_ROM_WHERETO 0x300
 #define DEBUG_ROM_ENTRY   0x800
+#define DEBUG_ROM_TVEC    0x808
 
 #endif

diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc
index 0f51f7b2f11797c8a700f8ef51f9d1f1195c398d..5d885927fcb45c2c3b41b97dba605afbedf010b9 100644 (file)
--- a/riscv/debug_module.cc
+++ b/riscv/debug_module.cc
@@ -6,6 +6,7 @@
 #include "mmu.h"
 
 #include "debug_rom/debug_rom.h"
+#include "debug_rom/debug_rom_defines.h"
 
 #if 1
 #  define D(x) x
@@ -15,9 +16,7 @@
 
 ///////////////////////// debug_module_t
 
-debug_module_t::debug_module_t(sim_t *sim) : sim(sim),
-  next_action(jal(ZERO, 0)),
-  action_executed(false)
+debug_module_t::debug_module_t(sim_t *sim) : sim(sim)
 {
   dmcontrol = {0};
 
@@ -30,12 +29,17 @@ debug_module_t::debug_module_t(sim_t *sim) : sim(sim),
 
   abstractauto = {0};
 
-  for (unsigned i = 0; i < DEBUG_ROM_ENTRY_SIZE / 4; i++) {
-    write32(debug_rom_entry, i, jal(ZERO, 0));
-    halted[i] = false;
-  }
-
+  memset(halted, 0, sizeof(halted));
+  memset(debug_rom_flags, 0, sizeof(debug_rom_flags));
+  memset(resumeack, 0, sizeof(resumeack));
   memset(program_buffer, 0, sizeof(program_buffer));
+  memset(dmdata, 0, sizeof(dmdata));
+
+  write32(debug_rom_whereto, 0,
+          jal(ZERO, DEBUG_ABSTRACT_START - DEBUG_ROM_WHERETO));
+
+  memset(debug_rom_abstract, 0, sizeof(debug_rom_abstract));
+ 
 }
 
 void debug_module_t::reset()
@@ -68,39 +72,23 @@ bool debug_module_t::load(reg_t addr, size_t len, uint8_t* bytes)
   addr = DEBUG_START + addr;
 
   if (addr >= DEBUG_ROM_ENTRY &&
-      addr < DEBUG_ROM_ENTRY + DEBUG_ROM_ENTRY_SIZE) {
-
-    if (read32(debug_rom_entry, dmcontrol.hartsel) == jal(ZERO, 0)) {
-      // We're here in an infinite loop. That means that whatever abstract
-      // command has complete.
-      abstractcs.busy = false;
-    }
-
-    action_executed = true;
-
-    halted[(addr - DEBUG_ROM_ENTRY) / 4] = true;
-    memcpy(bytes, debug_rom_entry + addr - DEBUG_ROM_ENTRY, len);
+      addr < DEBUG_ROM_ENTRY + debug_rom_raw_len) {
+    memcpy(bytes, debug_rom_raw + addr - DEBUG_ROM_ENTRY, len);
     return true;
   }
 
-  if (action_executed) {
-    // Restore the jump-to-self loop.
-    write32(debug_rom_entry, dmcontrol.hartsel, next_action);
-    next_action = jal(ZERO, 0);
-    action_executed = false;
+  if (addr >= DEBUG_ROM_WHERETO && addr < DEBUG_ROM_WHERETO + 4) {
+    memcpy(bytes, debug_rom_whereto + addr - DEBUG_ROM_WHERETO, len);
+    return true;
   }
 
-  if (addr >= DEBUG_ROM_CODE &&
-      addr < DEBUG_ROM_CODE + DEBUG_ROM_CODE_SIZE) {
-
-    if (read32(debug_rom_code, 0) == dret()) {
-      abstractcs.busy = false;
-      halted[dmcontrol.hartsel] = false;
-      resumeack[dmcontrol.hartsel] = true;
-    }
+  if (addr >= DEBUG_ROM_FLAGS && addr < DEBUG_ROM_FLAGS + 1024) {
+    memcpy(bytes, debug_rom_flags + addr - DEBUG_ROM_FLAGS, len);
+    return true;
+  }
 
-    fprintf(stderr, "returning the  debug rom code.\n");
-    memcpy(bytes, debug_rom_code + addr - DEBUG_ROM_CODE, len);
+  if (addr >= DEBUG_ABSTRACT_START && addr < DEBUG_ABSTRACT_END) {
+    memcpy(bytes, debug_rom_abstract + addr - DEBUG_ABSTRACT_START, len);
     return true;
   }
 
@@ -114,15 +102,6 @@ bool debug_module_t::load(reg_t addr, size_t len, uint8_t* bytes)
     return true;
   }
 
-  if (addr >= DEBUG_ROM_EXCEPTION &&
-      addr < DEBUG_ROM_EXCEPTION + DEBUG_ROM_EXCEPTION_SIZE) {
-    memcpy(bytes, debug_rom_exception + addr - DEBUG_ROM_EXCEPTION, len);
-    if (abstractcs.cmderr == CMDERR_NONE) {
-      abstractcs.cmderr = CMDERR_EXCEPTION;
-    }
-    return true;
-  }
-
   fprintf(stderr, "ERROR: invalid load from debug module: %zd bytes at 0x%016"
           PRIx64 "\n", len, addr);
 
@@ -132,6 +111,13 @@ bool debug_module_t::load(reg_t addr, size_t len, uint8_t* bytes)
 bool debug_module_t::store(reg_t addr, size_t len, const uint8_t* bytes)
 {
 
+  uint8_t id_bytes[4];
+  uint32_t id = 0;
+  if (len == 4) {
+    memcpy(id_bytes, bytes, 4);
+    id = read32(id_bytes, 0);
+  }
+
   addr = DEBUG_START + addr;
   
   if (addr >= DEBUG_DATA_START && addr < DEBUG_DATA_END) {
@@ -144,6 +130,39 @@ bool debug_module_t::store(reg_t addr, size_t len, const uint8_t* bytes)
     return true;
   }
 
+  if (addr == DEBUG_ROM_HALTED) {
+    assert (len == 4);
+    halted[id] = true;
+    if (dmcontrol.hartsel == id) {
+        if (0 == (debug_rom_flags[id] & (1 << DEBUG_ROM_FLAG_GO))){
+          if (dmcontrol.hartsel == id) {
+              abstractcs.busy = false;
+          }
+        }
+    }
+    return true;
+  }
+
+  if (addr == DEBUG_ROM_GOING) {
+    debug_rom_flags[dmcontrol.hartsel] &= ~(1 << DEBUG_ROM_FLAG_GO);
+    return true;
+  }
+
+  if (addr == DEBUG_ROM_RESUMING) {
+    assert (len == 4);
+    halted[id] = false;
+    resumeack[id] = true;
+    debug_rom_flags[id] &= ~(1 << DEBUG_ROM_FLAG_RESUME);
+    return true;
+  }
+
+  if (addr == DEBUG_ROM_EXCEPTION) {
+    if (abstractcs.cmderr == CMDERR_NONE) {
+      abstractcs.cmderr = CMDERR_EXCEPTION;
+    }
+    return true;
+  }
+
   fprintf(stderr, "ERROR: invalid store to debug module: %zd bytes at 0x%016"
           PRIx64 "\n", len, addr);
   return false;
@@ -184,17 +203,22 @@ bool debug_module_t::dmi_read(unsigned address, uint32_t *value)
   D(fprintf(stderr, "dmi_read(0x%x) -> ", address));
   if (address >= DMI_DATA0 && address < DMI_DATA0 + abstractcs.datacount) {
     unsigned i = address - DMI_DATA0;
-    result = read32(dmdata, address - DMI_DATA0);
+    result = read32(dmdata, i);
 
     if (abstractcs.busy && abstractcs.cmderr == CMDERR_NONE) {
       abstractcs.cmderr = CMDERR_BUSY;
     }
 
-    if ((abstractauto.autoexecdata >> i) & 1)
+    if ((abstractauto.autoexecdata >> i) & 1){
       perform_abstract_command();
+    }
   } else if (address >= DMI_PROGBUF0 && address < DMI_PROGBUF0 + progsize) {
-    // TODO : Autoexec progbuf.
-    result = read32(program_buffer, address - DMI_PROGBUF0);
+    unsigned i = address = DMI_PROGBUF0;
+    result = read32(program_buffer, i);
+    if ((abstractauto.autoexecprogbuf >> i) & 1) {
+      perform_abstract_command();
+    }
+
   } else {
     switch (address) {
       case DMI_DMCONTROL:
@@ -304,31 +328,32 @@ bool debug_module_t::perform_abstract_command()
     bool write = get_field(command, AC_ACCESS_REGISTER_WRITE);
     unsigned regno = get_field(command, AC_ACCESS_REGISTER_REGNO);
 
-    if (regno < 0x1000 || regno >= 0x1020) {
-      abstractcs.cmderr = CMDERR_NOTSUP;
-      return true;
-    }
-
-    unsigned regnum = regno - 0x1000;
-
     if (!halted[dmcontrol.hartsel]) {
       abstractcs.cmderr = CMDERR_HALTRESUME;
       return true;
     }
 
     if (get_field(command, AC_ACCESS_REGISTER_TRANSFER)) {
+
+      if (regno < 0x1000 || regno >= 0x1020) {
+        abstractcs.cmderr = CMDERR_NOTSUP;
+        return true;
+      }
+
+      unsigned regnum = regno - 0x1000;
+
       switch (size) {
       case 2:
         if (write)
-          write32(debug_rom_code, 0, lw(regnum, ZERO, DEBUG_DATA_START));
+          write32(debug_rom_abstract, 0, lw(regnum, ZERO, DEBUG_DATA_START));
         else
-          write32(debug_rom_code, 0, sw(regnum, ZERO, DEBUG_DATA_START));
+          write32(debug_rom_abstract, 0, sw(regnum, ZERO, DEBUG_DATA_START));
         break;
       case 3:
         if (write)
-          write32(debug_rom_code, 0, ld(regnum, ZERO, DEBUG_DATA_START));
+          write32(debug_rom_abstract, 0, ld(regnum, ZERO, DEBUG_DATA_START));
         else
-          write32(debug_rom_code, 0, sd(regnum, ZERO, DEBUG_DATA_START));
+          write32(debug_rom_abstract, 0, sd(regnum, ZERO, DEBUG_DATA_START));
         break;
         /*
           case 4:
@@ -344,21 +369,17 @@ bool debug_module_t::perform_abstract_command()
       }
     } else {
       // Should be a NOP. Store DEBUG_DATA to x0.
-      write32(debug_rom_code, 0, sw(ZERO, ZERO, DEBUG_DATA_START));
+      write32(debug_rom_abstract, 0, sw(ZERO, ZERO, DEBUG_DATA_START));
     }
     
     if (get_field(command, AC_ACCESS_REGISTER_POSTEXEC)) {
-      write32(debug_rom_code, 1, jal(ZERO, DEBUG_PROGBUF_START - DEBUG_ROM_CODE - 4));
+      write32(debug_rom_abstract, 1, jal(ZERO, DEBUG_PROGBUF_START - DEBUG_ABSTRACT_START));
     } else {
-      write32(debug_rom_code, 1, ebreak());
+      write32(debug_rom_abstract, 1, ebreak());
     }
 
+    debug_rom_flags[dmcontrol.hartsel] |= 1 << DEBUG_ROM_FLAG_GO;
     
-    write32(debug_rom_entry, dmcontrol.hartsel,
-            jal(ZERO, DEBUG_ROM_CODE - (DEBUG_ROM_ENTRY + 4 * dmcontrol.hartsel)));
-    
-    write32(debug_rom_exception, dmcontrol.hartsel,
-        jal(ZERO, (DEBUG_ROM_ENTRY + 4 * dmcontrol.hartsel) - DEBUG_ROM_EXCEPTION));
     abstractcs.busy = true;
   } else {
     abstractcs.cmderr = CMDERR_NOTSUP;
@@ -401,10 +422,7 @@ bool debug_module_t::dmi_write(unsigned address, uint32_t value)
           if (proc) {
             proc->halt_request = dmcontrol.haltreq;
             if (dmcontrol.resumereq) {
-              write32(debug_rom_code, 0, dret());
-              write32(debug_rom_entry, dmcontrol.hartsel,
-                  jal(ZERO, DEBUG_ROM_CODE - (DEBUG_ROM_ENTRY + 4 * dmcontrol.hartsel)));
-              abstractcs.busy = true;
+              debug_rom_flags[dmcontrol.hartsel] |= (1 << DEBUG_ROM_FLAG_RESUME);
               resumeack[dmcontrol.hartsel] = false;
             }
           }

diff --git a/riscv/debug_module.h b/riscv/debug_module.h
index 8daf03b58caa9b783da3a45382db5e74944cbbaa..d3398ea69e1ae995fe322b2b3b55ff402cc55b0c 100644 (file)
--- a/riscv/debug_module.h
+++ b/riscv/debug_module.h
@@ -77,19 +77,14 @@ class debug_module_t : public abstract_device_t
 
     sim_t *sim;
 
-    uint8_t debug_rom_entry[DEBUG_ROM_ENTRY_SIZE];
-    uint8_t debug_rom_code[DEBUG_ROM_CODE_SIZE];
-    uint8_t debug_rom_exception[DEBUG_ROM_EXCEPTION_SIZE];
+    uint8_t debug_rom_whereto[4];
+    uint8_t debug_rom_abstract[4*2];
     uint8_t program_buffer[progsize * 4];
     uint8_t dmdata[DEBUG_DATA_SIZE];
     
     bool halted[1024];
     bool resumeack[1024];
-
-    // Instruction that will be placed at the current hart's ROM entry address
-    // after the current action has completed.
-    uint32_t next_action;
-    bool action_executed;
+    uint8_t debug_rom_flags[1024];
 
     void write32(uint8_t *rom, unsigned int index, uint32_t value);
     uint32_t read32(uint8_t *rom, unsigned int index);

diff --git a/riscv/decode.h b/riscv/decode.h
index 551f4515af226259f69617f29ce119ca3909be07..45d1c58fc82777a7ed298ca848c2a6dde7b5db66 100644 (file)
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -249,13 +249,6 @@ inline freg_t freg(freg_t f) { return f; }
 // Seems that 0x0 doesn't work.
 #define DEBUG_START             0x100
 
-#define DEBUG_ROM_ENTRY         0x400
-#define DEBUG_ROM_ENTRY_SIZE    (1024 * 4)
-#define DEBUG_ROM_CODE          (DEBUG_ROM_ENTRY + DEBUG_ROM_ENTRY_SIZE)
-#define DEBUG_ROM_CODE_SIZE     256
-#define DEBUG_ROM_EXCEPTION     (DEBUG_ROM_CODE + DEBUG_ROM_CODE_SIZE)
-#define DEBUG_ROM_EXCEPTION_SIZE        4
-
 #define DEBUG_DATA_START          0x380
 #define DEBUG_DATA_SIZE           0x20
 #define DEBUG_DATA_END            DEBUG_DATA_START + DEBUG_DATA_SIZE
@@ -264,6 +257,10 @@ inline freg_t freg(freg_t f) { return f; }
 #define DEBUG_PROGBUF_START       DEBUG_DATA_START - DEBUG_PROGBUF_SIZE
 #define DEBUG_PROGBUF_END         DEBUG_PROGBUF_START + DEBUG_PROGBUF_SIZE
 
-#define DEBUG_END                 0x2000 - 1
+#define DEBUG_ABSTRACT_SIZE 2*4
+#define DEBUG_ABSTRACT_START (DEBUG_PROGBUF_START - DEBUG_ABSTRACT_SIZE)
+#define DEBUG_ABSTRACT_END   (DEBUG_ABSTRACT_START + DEBUG_ABSTRACT_SIZE)
+
+#define DEBUG_END                 (0x1000 - 1)
 
 #endif

diff --git a/riscv/execute.cc b/riscv/execute.cc
index 7734ca2749d6756ca2270e6c359a3d28db712ec9..303effee84ae4f9c3851c5ec0788683fbe007d95 100644 (file)
--- a/riscv/execute.cc
+++ b/riscv/execute.cc
@@ -65,7 +65,8 @@ void processor_t::step(size_t n)
   if (state.dcsr.cause == DCSR_CAUSE_NONE) {
     if (halt_request) {
       enter_debug_mode(DCSR_CAUSE_DEBUGINT);
-    } else if (state.dcsr.halt) {
+    } // !!!The halt bit in DCSR is deprecated.
+    else if (state.dcsr.halt) {
       enter_debug_mode(DCSR_CAUSE_HALT);
     }
   }
@@ -116,12 +117,14 @@ void processor_t::step(size_t n)
             break;
           }
 
-          if (unlikely(state.pc >= DEBUG_ROM_ENTRY &&
-                state.pc < DEBUG_ROM_ENTRY + DEBUG_ROM_ENTRY_SIZE)) {
-            // We're spinning waiting for the debugger to tell us something.
-            // Let's go talk to the debugger.
+          if (unlikely(state.pc >= DEBUG_START &&
+                       state.pc < DEBUG_END)) {
+            // We're waiting for the debugger to tell us something.
             return;
           }
+
+          
+          
         }
       }
       else while (instret < n)

diff --git a/riscv/processor.cc b/riscv/processor.cc
index d6da193eba5baef80b0a56402507d8cc51243598..b2c2d344ec0e3db50120db13e09153d2e706d108 100644 (file)
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -210,10 +210,8 @@ void processor_t::take_trap(trap_t& t, reg_t epc)
   if (state.dcsr.cause) {
     if (t.cause() == CAUSE_BREAKPOINT) {
       state.pc = debug_rom_entry();
-      fprintf(stderr, "Breakpoint.");
     } else {
-      fprintf(stderr, "WE ARE IN DEBUG MODE, DEBUG_ROM_EXCEPTION\n");
-      state.pc = DEBUG_ROM_EXCEPTION;
+      state.pc = DEBUG_ROM_TVEC;
     }
     return;
   }

diff --git a/riscv/processor.h b/riscv/processor.h
index ea9cb7bab59efc0c598543f0ec290972ebb5d0d1..071f4581f0e8091c6a92016cd8b6f824328843fa 100644 (file)
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -8,6 +8,7 @@
 #include <string>
 #include <vector>
 #include <map>
+#include "debug_rom/debug_rom_defines.h"
 
 class processor_t;
 class mmu_t;