Set badaddr=0 on illegal instruction traps
[riscv-isa-sim.git] / riscv / extension.cc
2017-03-28 Andrew WatermanSet badaddr=0 on illegal instruction traps
2017-02-07 Tim NewsomeMerge pull request #83 from bacam/gdb-protocol-fixes
2017-02-03 Andrew WatermanFix interrupt delegation for coprocessors
2016-03-02 Andrew WatermanWIP on priv spec v1.9
2015-09-08 Andrew WatermanRefer to LICENSE in some newer source files
2015-03-16 Yunsup Leebugfix in raising accelerator interrupts
2015-03-13 Andrew WatermanUpdate to new privileged spec
2014-01-28 Andrew WatermanForce extension loaders to be linked in
2014-01-27 Andrew WatermanEliminate hwacha <-> riscv circular dependence
2013-10-16 Yunsup Leerevamp hwacha; now runs in physical mode
2013-08-13 Andrew WatermanImplement RoCC and add a dummy RoCC