Split ERET into URET, SRET, HRET, MRET
[riscv-isa-sim.git] / riscv / insns / sret.h
2016-04-20 Andrew WatermanSplit ERET into URET, SRET, HRET, MRET
2016-03-02 Andrew WatermanFix ERET bug
2016-03-02 Andrew WatermanSerialize simulator on ERET
2016-03-02 Andrew WatermanWIP on priv spec v1.9
2015-03-17 Andrew WatermanMerge [shm]call into ecall, [shm]ret into eret
2015-03-13 Andrew WatermanUpdate to new privileged spec
2014-01-21 Quan NguyenMerge branch 'confprec'
2013-11-25 Andrew WatermanUpdate to new privileged ISA