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[xcc] minor performance tweaks
[riscv-isa-sim.git] / riscv / insns / stop.h
2011-04-10 Yunsup Lee[sim] add vector traps to vector instructions blob | commitdiff | raw
2011-04-10 Yunsup Lee[sim] add vt stuff blob | commitdiff | raw | diff to current
2011-04-04 Yunsup Lee[opcodes,pk,sim,xcc] add stop,utidx instructions blob | commitdiff | raw | diff to current
Simple-V augmented version of spike