Add --enable-misaligned option for misaligned ld/st support
[riscv-isa-sim.git] / riscv / riscv.ac
2017-04-06 Andrew WatermanAdd --enable-misaligned option for misaligned ld/st...
2017-02-19 Andrew WatermanMake HW setting of PTE A/D bits optional (by configure...
2016-04-03 Andrew WatermanAllow configuration of default ISA with --with-isa
2015-04-04 Andrew WatermanSupport setting ISA/subsets with --isa flag
2015-03-31 Andrew WatermanImplement RVC draft
2015-01-09 Stephen TwiggFix bug where C compiler used instead of C++ for autoco...
2014-09-21 Scott BeamerMerge pull request #2 from arunthomas/build_fix
2014-09-21 Arun ThomasUpdate riscv.ac to set CPPFLAGS with fesvr include...
2014-08-15 Christopher CelioAdded PC histogram option.
2014-01-27 Andrew WatermanEnable runtime loading of dynamic library with --extlib
2014-01-24 Andrew WatermanRequire libdl for dynamic linking at runtime
2014-01-24 Andrew WatermanBuild and use shared libraries only
2014-01-24 Andrew WatermanBuild and use shared libraries
2013-09-27 Christopher CelioAdded commit logging (--enable-commitlog). Also fixed...
2013-07-27 Andrew WatermanRemove more vector stuff
2013-01-26 Andrew Watermanchange htif to link against libfesvr
2011-11-12 Your NameRemove dependence on binutils
2011-11-11 Andrew WatermanUse new compiler toolchain's disassembler
2011-07-08 Rimas Avizienisbugfix to riscv.ac
2011-07-08 Rimas Avizienisfixes to make disassembly work under macos (with macpor...
2011-06-20 Andrew Watermantemporary undoing of renaming
2011-06-13 Andrew Waterman[sim] renamed to riscv-isa-run
2011-06-11 Andrew Waterman[xcc] fix configure scripts
2011-04-15 Andrew Waterman[sim] added icache simulator (disabled by default)
2011-04-10 Yunsup Lee[sim] add disable option for vector
2011-04-10 Andrew Waterman[sim,pk] reorganized status register
2010-10-16 Andrew Waterman[pk, sim] added FPU emulation support to proxy kernel
2010-07-19 Andrew WatermanReorganized directory structure