add cpuFetchStage instance

diff --git a/cpu.py b/cpu.py
index 98e888ab20fbe2f5edf9c86179340158b13e8999..1e83db0abd07ee4c337893c1e8ab0deb07e22bd0 100644 (file)
--- a/cpu.py
+++ b/cpu.py
@@ -101,33 +101,27 @@ class CPU(Module):
                   )
         self.specials += mi
 
                   )
         self.specials += mi
 

-"""
-    cpu_memory_interface #(
-        .ram_size(ram_size),
-        .ram_start(ram_start)
-        ) memory_interface(
-        .clk(clk),
-        .reset(reset),
-        .fetch_address(memory_interface_fetch_address),
-        .fetch_data(memory_interface_fetch_data),
-        .fetch_valid(memory_interface_fetch_valid),
-        .rw_address(memory_interface_rw_address),
-        .rw_byte_mask(memory_interface_rw_byte_mask),
-        .rw_read_not_write(memory_interface_rw_read_not_write),
-        .rw_active(memory_interface_rw_active),
-        .rw_data_in(memory_interface_rw_data_in),
-        .rw_data_out(memory_interface_rw_data_out),
-        .rw_address_valid(memory_interface_rw_address_valid),
-        .rw_wait(memory_interface_rw_wait),
-        .tty_write(tty_write),
-        .tty_write_data(tty_write_data),
-        .tty_write_busy(tty_write_busy),
-        .switch_2(switch_2),
-        .switch_3(switch_3),
-        .led_1(led_1),
-        .led_3(led_3)
-        );
-"""
+        fetch_act = Signal(fetch_action)
+        fetch_target_pc = Signal(32)
+        fetch_output_pc = Signal(32)
+        fetch_output_instruction = Signal(32)
+        fetch_output_st = Signal(fetch_output_state)
+
+        fs = Instance("CPUFetchStage",
+            i_clk=ClockSignal(),
+            i_rst=ResetSignal(),
+            o_memory_interface_fetch_address = memory_interface_fetch_address,
+            i_memory_interface_fetch_data = memory_interface_fetch_data,
+            i_memory_interface_fetch_valid = memory_interface_fetch_valid,
+            i_fetch_action = fetch_act,
+            i_target_pc = fetch_target_pc,
+            o_output_pc = fetch_output_pc,
+            o_output_instruction = fetch_output_instruction,
+            o_output_state = fetch_output_st,
+            i_reset_vector = reset_vector,
+            i_mtvec = mtvec,
+        )
+        self.specials += fs

 
 if __name__ == "__main__":
     example = CPU()
 
 if __name__ == "__main__":
     example = CPU()


@@ -143,63 +137,6 @@ if __name__ == "__main__":
            }))
 
 """
            }))
 
 """

-module cpu(
-    input clk,
-    input reset,
-    output tty_write,
-    output [7:0] tty_write_data,
-    input tty_write_busy,
-    input switch_2,
-    input switch_3,
-    output led_1,
-    output led_3
-    );
-
-    parameter ram_size = 'h8000;
-    parameter ram_start = 32'h1_0000;
-    parameter reset_vector = ram_start;
-    parameter mtvec = ram_start + 'h40;
-
-    reg [31:0] registers[31:1];
-
-    wire [31:2] memory_interface_fetch_address;
-    wire [31:0] memory_interface_fetch_data;
-    wire memory_interface_fetch_valid;
-    wire [31:2] memory_interface_rw_address;
-    wire [3:0] memory_interface_rw_byte_mask;
-    wire memory_interface_rw_read_not_write;
-    wire memory_interface_rw_active;
-    wire [31:0] memory_interface_rw_data_in;
-    wire [31:0] memory_interface_rw_data_out;
-    wire memory_interface_rw_address_valid;
-    wire memory_interface_rw_wait;
-
-    cpu_memory_interface #(
-        .ram_size(ram_size),
-        .ram_start(ram_start)
-        ) memory_interface(
-        .clk(clk),
-        .reset(reset),
-        .fetch_address(memory_interface_fetch_address),
-        .fetch_data(memory_interface_fetch_data),
-        .fetch_valid(memory_interface_fetch_valid),
-        .rw_address(memory_interface_rw_address),
-        .rw_byte_mask(memory_interface_rw_byte_mask),
-        .rw_read_not_write(memory_interface_rw_read_not_write),
-        .rw_active(memory_interface_rw_active),
-        .rw_data_in(memory_interface_rw_data_in),
-        .rw_data_out(memory_interface_rw_data_out),
-        .rw_address_valid(memory_interface_rw_address_valid),
-        .rw_wait(memory_interface_rw_wait),
-        .tty_write(tty_write),
-        .tty_write_data(tty_write_data),
-        .tty_write_busy(tty_write_busy),
-        .switch_2(switch_2),
-        .switch_3(switch_3),
-        .led_1(led_1),
-        .led_3(led_3)
-        );
-

     wire `fetch_action fetch_action;
     wire [31:0] fetch_target_pc;
     wire [31:0] fetch_output_pc;
     wire `fetch_action fetch_action;
     wire [31:0] fetch_target_pc;
     wire [31:0] fetch_output_pc;