Implement new FP encoding
[riscv-isa-sim.git] / riscv / insns / flw.h
index a5f7d16eaab263ec39022ea4f342d5cc5affbbb4..61297544405cb65b65da17122e98247fccafa2ff 100644 (file)
@@ -1,2 +1,3 @@
+require_extension('F');
 require_fp;
-WRITE_FRD(MMU.load_int32(RS1 + insn.i_imm()));
+WRITE_FRD(f32(MMU.load_uint32(RS1 + insn.i_imm())));