git.libre-soc.org Git - riscv-isa-sim.git/commit

author	Andrew Waterman <andrew@sifive.com>
	Tue, 11 Apr 2017 00:35:24 +0000 (17:35 -0700)
committer	Andrew Waterman <andrew@sifive.com>
	Tue, 11 Apr 2017 00:35:24 +0000 (17:35 -0700)
commit	d6fce459767509249311a120fddb21c844dc9b2c
tree	b54272d8ce52f773b13dd33ae94d634538ec6599	tree
parent	5f494a22db29d69893db4b39f488cf67c0ac6437	commit \| diff

Implement new FP encoding

https://groups.google.com/a/groups.riscv.org/d/msg/isa-dev/_r7hBlzsEd8/cWPyJKMzCQAJ

57 files changed:

riscv/decode.h		diff \| blob \| history
riscv/insns/c_fld.h		diff \| blob \| history
riscv/insns/c_fldsp.h		diff \| blob \| history
riscv/insns/c_flw.h		diff \| blob \| history
riscv/insns/c_flwsp.h		diff \| blob \| history
riscv/insns/c_fsd.h		diff \| blob \| history
riscv/insns/c_fsdsp.h		diff \| blob \| history
riscv/insns/c_fsw.h		diff \| blob \| history
riscv/insns/c_fswsp.h		diff \| blob \| history
riscv/insns/fadd_d.h		diff \| blob \| history
riscv/insns/fadd_s.h		diff \| blob \| history
riscv/insns/fcvt_d_l.h		diff \| blob \| history
riscv/insns/fcvt_d_lu.h		diff \| blob \| history
riscv/insns/fcvt_d_s.h		diff \| blob \| history
riscv/insns/fcvt_d_w.h		diff \| blob \| history
riscv/insns/fcvt_d_wu.h		diff \| blob \| history
riscv/insns/fcvt_s_d.h		diff \| blob \| history
riscv/insns/fcvt_s_l.h		diff \| blob \| history
riscv/insns/fcvt_s_lu.h		diff \| blob \| history
riscv/insns/fcvt_s_w.h		diff \| blob \| history
riscv/insns/fcvt_s_wu.h		diff \| blob \| history
riscv/insns/fdiv_d.h		diff \| blob \| history
riscv/insns/fdiv_s.h		diff \| blob \| history
riscv/insns/fld.h		diff \| blob \| history
riscv/insns/flw.h		diff \| blob \| history
riscv/insns/fmadd_d.h		diff \| blob \| history
riscv/insns/fmadd_s.h		diff \| blob \| history
riscv/insns/fmax_d.h		diff \| blob \| history
riscv/insns/fmax_s.h		diff \| blob \| history
riscv/insns/fmin_d.h		diff \| blob \| history
riscv/insns/fmin_s.h		diff \| blob \| history
riscv/insns/fmsub_d.h		diff \| blob \| history
riscv/insns/fmsub_s.h		diff \| blob \| history
riscv/insns/fmul_d.h		diff \| blob \| history
riscv/insns/fmul_s.h		diff \| blob \| history
riscv/insns/fmv_d_x.h		diff \| blob \| history
riscv/insns/fmv_s_x.h		diff \| blob \| history
riscv/insns/fmv_x_d.h		diff \| blob \| history
riscv/insns/fmv_x_s.h		diff \| blob \| history
riscv/insns/fnmadd_d.h		diff \| blob \| history
riscv/insns/fnmadd_s.h		diff \| blob \| history
riscv/insns/fnmsub_d.h		diff \| blob \| history
riscv/insns/fnmsub_s.h		diff \| blob \| history
riscv/insns/fsd.h		diff \| blob \| history
riscv/insns/fsgnj_d.h		diff \| blob \| history
riscv/insns/fsgnj_s.h		diff \| blob \| history
riscv/insns/fsgnjn_d.h		diff \| blob \| history
riscv/insns/fsgnjn_s.h		diff \| blob \| history
riscv/insns/fsgnjx_d.h		diff \| blob \| history
riscv/insns/fsgnjx_s.h		diff \| blob \| history
riscv/insns/fsqrt_d.h		diff \| blob \| history
riscv/insns/fsqrt_s.h		diff \| blob \| history
riscv/insns/fsub_d.h		diff \| blob \| history
riscv/insns/fsub_s.h		diff \| blob \| history
riscv/insns/fsw.h		diff \| blob \| history
riscv/interactive.cc		diff \| blob \| history
riscv/sim.h		diff \| blob \| history

Simple-V augmented version of spike

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