Implement new FP encoding

[riscv-isa-sim.git] / riscv / insns / fsqrt_s.h

diff --git a/riscv/insns/fsqrt_s.h b/riscv/insns/fsqrt_s.h
index f3b39564f80968badfe7f7cc3f07a325665db408..747684664e7c9b7b2ac7d8abd0917aadaca041e5 100644 (file)
--- a/riscv/insns/fsqrt_s.h
+++ b/riscv/insns/fsqrt_s.h
@@ -1,5 +1,5 @@
 require_extension('F');
 require_fp;
 softfloat_roundingMode = RM;
-WRITE_FRD(f32_sqrt(f32(FRS1)).v);
+WRITE_FRD(f32_sqrt(f32(FRS1)));
 set_fp_exceptions;