Implement new FP encoding

[riscv-isa-sim.git] / riscv / insns / fdiv_s.h

diff --git a/riscv/insns/fdiv_s.h b/riscv/insns/fdiv_s.h
index 66ac48da24a325c8081a8e179398b754236a6fc6..c74ff0415cb7026e58f87af4e8c9a056c6eb0310 100644 (file)
--- a/riscv/insns/fdiv_s.h
+++ b/riscv/insns/fdiv_s.h
@@ -1,5 +1,5 @@
 require_extension('F');
 require_fp;
 softfloat_roundingMode = RM;
-WRITE_FRD(f32_div(f32(FRS1), f32(FRS2)).v);
+WRITE_FRD(f32_div(f32(FRS1), f32(FRS2)));
 set_fp_exceptions;