git.libre-soc.org Git - riscv-isa-sim.git/history

2017-04-11	Andrew Waterman	Implement new FP encoding	blob \| commitdiff \| raw
2015-04-04	Andrew Waterman	Support setting ISA/subsets with --isa flag	blob \| commitdiff \| raw \| diff to current
2013-09-27	Andrew Waterman	Use WRITE_RD/WRITE_FRD macros to write registers	blob \| commitdiff \| raw \| diff to current
2011-06-20	Andrew Waterman	temporary undoing of renaming	blob \| commitdiff \| raw \| diff to current
2011-06-13	Andrew Waterman	[sim] renamed to riscv-isa-run	blob \| commitdiff \| raw
2011-02-15	Andrew Waterman	[xcc,opcodes,pk,sim] krste's re-renaming spree	blob \| commitdiff \| raw \| diff to current

Simple-V augmented version of spike