Implement new FP encoding
[riscv-isa-sim.git] / riscv / insns / fmin_d.h
1 require_extension('D');
2 require_fp;
3 WRITE_FRD(f64_lt_quiet(f64(FRS1), f64(FRS2)) || isNaNF64UI(f64(FRS2).v) ? FRS1 : FRS2);
4 if ((isNaNF64UI(f64(FRS1).v) && isNaNF64UI(f64(FRS2).v)) || softfloat_exceptionFlags)
5 WRITE_FRD(f64(defaultNaNF64UI));
6 set_fp_exceptions;