Implement new FP encoding

[riscv-isa-sim.git] / riscv / insns / c_flw.h

diff --git a/riscv/insns/c_flw.h b/riscv/insns/c_flw.h
index 0be27a94a4cc1d16cba37f9ac34cd38ddf258437..682566c705b764366f4681b6eff3dd85a2c27efa 100644 (file)
--- a/riscv/insns/c_flw.h
+++ b/riscv/insns/c_flw.h
@@ -2,7 +2,7 @@ require_extension('C');
 if (xlen == 32) {
   require_extension('F');
   require_fp;
-  WRITE_RVC_FRS2S(MMU.load_int32(RVC_RS1S + insn.rvc_lw_imm()));
+  WRITE_RVC_FRS2S(f32(MMU.load_uint32(RVC_RS1S + insn.rvc_lw_imm())));
 } else { // c.ld
   WRITE_RVC_RS2S(MMU.load_int64(RVC_RS1S + insn.rvc_ld_imm()));
 }