Implement new FP encoding
[riscv-isa-sim.git] / riscv / insns / fmax_s.h
1 require_extension('F');
2 require_fp;
3 WRITE_FRD(f32_le_quiet(f32(FRS2), f32(FRS1)) || isNaNF32UI(f32(FRS2).v) ? FRS1 : FRS2);
4 if ((isNaNF32UI(f32(FRS1).v) && isNaNF32UI(f32(FRS2).v)) || softfloat_exceptionFlags)
5 WRITE_FRD(f32(defaultNaNF32UI));
6 set_fp_exceptions;