Implement new FP encoding

[riscv-isa-sim.git] / riscv / insns / fmadd_s.h

diff --git a/riscv/insns/fmadd_s.h b/riscv/insns/fmadd_s.h
index a78ed25c04c3767bca5ff8645f400698fc714c71..e919190caaa04608acc04e172614bfcd432ad2e3 100644 (file)
--- a/riscv/insns/fmadd_s.h
+++ b/riscv/insns/fmadd_s.h
@@ -1,5 +1,5 @@
 require_extension('F');
 require_fp;
 softfloat_roundingMode = RM;
-WRITE_FRD(f32_mulAdd(f32(FRS1), f32(FRS2), f32(FRS3)).v);
+WRITE_FRD(f32_mulAdd(f32(FRS1), f32(FRS2), f32(FRS3)));
 set_fp_exceptions;