Zero-extend flw, fmv_s_x instructions

[riscv-isa-sim.git] / riscv / insns / fmv_s_x.h

diff --git a/riscv/insns/fmv_s_x.h b/riscv/insns/fmv_s_x.h
index f3eac828625486d3590c9138761ebfa07b6bd7cd..2daf6dabe06be573999a3f1abf6012de47904102 100644 (file)
--- a/riscv/insns/fmv_s_x.h
+++ b/riscv/insns/fmv_s_x.h
@@ -1,2 +1,3 @@
+require_extension('F');
 require_fp;
-WRITE_FRD(RS1);
+WRITE_FRD(zext32(RS1));