Implement new FP encoding

[riscv-isa-sim.git] / riscv / insns / fnmadd_s.h

diff --git a/riscv/insns/fnmadd_s.h b/riscv/insns/fnmadd_s.h
index 78abb78f11fc73a28eabf8d0d2da06e17f3dfa19..1c2996e3125909af3f6408f1798c5b717df4ae66 100644 (file)
--- a/riscv/insns/fnmadd_s.h
+++ b/riscv/insns/fnmadd_s.h
@@ -1,4 +1,5 @@
+require_extension('F');
 require_fp;
 softfloat_roundingMode = RM;
-FRD = f32_mulAdd(FRS1, FRS2, FRS3) ^ (uint32_t)INT32_MIN;
+WRITE_FRD(f32_mulAdd(f32(f32(FRS1).v ^ F32_SIGN), f32(FRS2), f32(f32(FRS3).v ^ F32_SIGN)));
 set_fp_exceptions;