[xcc] minor performance tweaks
[riscv-isa-sim.git] / riscv / insns / c_addi.h
2011-06-11 Andrew Waterman[xcc] instructions now set PC explicitly
2011-04-24 Andrew Waterman[xcc,sim,opcodes] added more RVC instructions
2011-04-12 Andrew Waterman[xcc,sim,opcodes] more rvc instructions and bug fixes
2011-04-10 Andrew Waterman[xcc,pk,sim,opcodes] added first RVC instruction