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libreriscv.git
3 years agoextend gaddie pitch
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Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 17:49:22 +0000 (17:49 +0000)]
extend gaddie pitch

3 years agoadd gaddie pitch section for LibreSOC
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Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 17:32:15 +0000 (17:32 +0000)]
add gaddie pitch section for LibreSOC

3 years agoupdate nlnet FAQ
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Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 14:36:54 +0000 (14:36 +0000)]
update nlnet FAQ

3 years agoupdate FAQ
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Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 11:57:13 +0000 (11:57 +0000)]
update FAQ

3 years agoadd name tag to FAQ
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Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 11:50:11 +0000 (11:50 +0000)]
add name tag to FAQ

3 years agoadd name tag to FAQ
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Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 11:49:50 +0000 (11:49 +0000)]
add name tag to FAQ

3 years agoadd name tag to FAQ
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Luke Kenneth Casson Leighton [Thu, 5 Nov 2020 11:49:06 +0000 (11:49 +0000)]
add name tag to FAQ

3 years agoadd to nlnet FAQ
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Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 18:55:29 +0000 (18:55 +0000)]
add to nlnet FAQ

3 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 4 Nov 2020 18:27:54 +0000 (18:27 +0000)]

3 years agoadd to NLnet FAQ
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Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 15:54:55 +0000 (15:54 +0000)]
add to NLnet FAQ

3 years agoadd to NLnet FAQ
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Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 15:49:33 +0000 (15:49 +0000)]
add to NLnet FAQ

3 years agoshow tab on imag
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Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 15:29:11 +0000 (15:29 +0000)]
show tab on imag

3 years agoupdate FPGA connector images
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Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 15:26:35 +0000 (15:26 +0000)]
update FPGA connector images

3 years agoadd circuit refs
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Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 15:26:26 +0000 (15:26 +0000)]
add circuit refs

3 years agochange to use 3.3v on VERSA X3
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Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 15:22:53 +0000 (15:22 +0000)]
change to use 3.3v on VERSA X3

3 years agoadd NLnet FAQ
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Luke Kenneth Casson Leighton [Wed, 4 Nov 2020 15:21:23 +0000 (15:21 +0000)]
add NLnet FAQ

3 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 4 Nov 2020 01:39:13 +0000 (01:39 +0000)]

3 years agoHDL_wokflow update ulx3s jtag jumper wire connection images to be
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Cole Poirier [Wed, 4 Nov 2020 01:37:45 +0000 (17:37 -0800)]
HDL_wokflow update ulx3s jtag jumper wire connection images to be
smaller

3 years agoHDL_workflow/ECP5_FPGA provide two images showing different orientation
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Cole Poirier [Wed, 4 Nov 2020 01:09:32 +0000 (17:09 -0800)]
HDL_workflow/ECP5_FPGA provide two images showing different orientation
of stlinkv2

3 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 4 Nov 2020 00:58:45 +0000 (00:58 +0000)]

3 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 4 Nov 2020 00:58:13 +0000 (00:58 +0000)]

3 years agoupdate photo for stlinkv2 JTAG wires in HDL_Workflow/ECP5_FPGA
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Cole Poirier [Wed, 4 Nov 2020 00:55:59 +0000 (16:55 -0800)]
update photo for stlinkv2 JTAG wires in HDL_Workflow/ECP5_FPGA

3 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 4 Nov 2020 00:27:06 +0000 (00:27 +0000)]

3 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Wed, 4 Nov 2020 00:21:42 +0000 (00:21 +0000)]

3 years agocolour-mark X3 VERSA ECP5 JTAG pins
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Luke Kenneth Casson Leighton [Tue, 3 Nov 2020 14:31:45 +0000 (14:31 +0000)]
colour-mark X3 VERSA ECP5 JTAG pins

3 years agoupdate jtag table, add colour to images
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Luke Kenneth Casson Leighton [Tue, 3 Nov 2020 14:26:35 +0000 (14:26 +0000)]
update jtag table, add colour to images

3 years agoadd stlinkv2 photos
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Luke Kenneth Casson Leighton [Tue, 3 Nov 2020 14:11:28 +0000 (14:11 +0000)]
add stlinkv2 photos

3 years agoadd stlinkv2 connector images
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Luke Kenneth Casson Leighton [Tue, 3 Nov 2020 14:10:33 +0000 (14:10 +0000)]
add stlinkv2 connector images

3 years agoswap wires around to match ulx3s
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Luke Kenneth Casson Leighton [Tue, 3 Nov 2020 13:53:28 +0000 (13:53 +0000)]
swap wires around to match ulx3s

3 years agoformat table
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Luke Kenneth Casson Leighton [Tue, 3 Nov 2020 13:50:32 +0000 (13:50 +0000)]
format table

3 years agoadd ECP5 JTAG connections
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Luke Kenneth Casson Leighton [Tue, 3 Nov 2020 13:47:29 +0000 (13:47 +0000)]
add ECP5 JTAG connections

3 years agoadd image links to ECP5 page
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Luke Kenneth Casson Leighton [Tue, 3 Nov 2020 13:35:24 +0000 (13:35 +0000)]
add image links to ECP5 page

3 years agoadd versa ecp5 x3 photo
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Luke Kenneth Casson Leighton [Tue, 3 Nov 2020 13:33:28 +0000 (13:33 +0000)]
add versa ecp5 x3 photo

3 years agoadd VERSA-ECP5 images, rename FPGA page
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Luke Kenneth Casson Leighton [Tue, 3 Nov 2020 13:29:07 +0000 (13:29 +0000)]
add VERSA-ECP5 images, rename FPGA page

3 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Sun, 1 Nov 2020 22:26:23 +0000 (22:26 +0000)]

3 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Sun, 1 Nov 2020 22:23:40 +0000 (22:23 +0000)]

3 years agoadd images to wiki for ulx3s jtag stlinkv2 wires
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Cole Poirier [Sun, 1 Nov 2020 22:17:06 +0000 (14:17 -0800)]
add images to wiki for ulx3s jtag stlinkv2 wires

3 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Sun, 1 Nov 2020 22:07:38 +0000 (22:07 +0000)]

3 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Sun, 1 Nov 2020 21:41:44 +0000 (21:41 +0000)]

3 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Sun, 1 Nov 2020 21:40:25 +0000 (21:40 +0000)]

3 years agoadd page use ulx3s fpga gpio pins for Libre-SOC JTAG connections to STLINKV2
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Sun, 1 Nov 2020 21:38:31 +0000 (21:38 +0000)]
add page use ulx3s fpga gpio pins for Libre-SOC JTAG connections to STLINKV2

3 years agoadd cross-ref links
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Luke Kenneth Casson Leighton [Sat, 31 Oct 2020 12:23:35 +0000 (12:23 +0000)]
add cross-ref links

3 years agoadjust image size
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Luke Kenneth Casson Leighton [Sat, 31 Oct 2020 12:15:20 +0000 (12:15 +0000)]
adjust image size

3 years agoadd description of table
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Luke Kenneth Casson Leighton [Sat, 31 Oct 2020 12:11:29 +0000 (12:11 +0000)]
add description of table

3 years agochange image size
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Luke Kenneth Casson Leighton [Sat, 31 Oct 2020 11:48:15 +0000 (11:48 +0000)]
change image size

3 years agoadd image size
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Luke Kenneth Casson Leighton [Sat, 31 Oct 2020 11:47:33 +0000 (11:47 +0000)]
add image size

3 years agoadd start of isa-to-virtual regs
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Luke Kenneth Casson Leighton [Sat, 31 Oct 2020 11:47:04 +0000 (11:47 +0000)]
add start of isa-to-virtual regs

3 years agoadd isa to virtual regs lookup
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Luke Kenneth Casson Leighton [Sat, 31 Oct 2020 11:45:14 +0000 (11:45 +0000)]
add isa to virtual regs lookup

3 years agoadd clock switch resource
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Luke Kenneth Casson Leighton [Fri, 30 Oct 2020 15:38:57 +0000 (15:38 +0000)]
add clock switch resource

3 years agospelling
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Luke Kenneth Casson Leighton [Fri, 30 Oct 2020 10:53:09 +0000 (10:53 +0000)]
spelling

3 years agoadd 180nm tapeout to progress
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Luke Kenneth Casson Leighton [Fri, 30 Oct 2020 10:52:44 +0000 (10:52 +0000)]
add 180nm tapeout to progress

3 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Thu, 29 Oct 2020 20:57:19 +0000 (20:57 +0000)]

3 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Thu, 29 Oct 2020 20:49:04 +0000 (20:49 +0000)]

3 years agowhitespace
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Luke Kenneth Casson Leighton [Thu, 29 Oct 2020 14:51:17 +0000 (14:51 +0000)]
whitespace

3 years ago(no commit message)
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lkcl [Thu, 29 Oct 2020 14:25:13 +0000 (14:25 +0000)]

3 years ago(no commit message)
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lkcl [Thu, 29 Oct 2020 14:13:48 +0000 (14:13 +0000)]

3 years agofurther investigation note
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Luke Kenneth Casson Leighton [Tue, 27 Oct 2020 20:46:44 +0000 (20:46 +0000)]
further investigation note

3 years agofurther investigation note
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Luke Kenneth Casson Leighton [Tue, 27 Oct 2020 20:34:20 +0000 (20:34 +0000)]
further investigation note

3 years agofurther investigation note
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Luke Kenneth Casson Leighton [Tue, 27 Oct 2020 20:33:38 +0000 (20:33 +0000)]
further investigation note

3 years agoadd header
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Jacob Lifshay [Tue, 27 Oct 2020 19:46:35 +0000 (12:46 -0700)]
add header

3 years agofinish compared_to_register_renaming.mdwn
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Jacob Lifshay [Tue, 27 Oct 2020 19:43:14 +0000 (12:43 -0700)]
finish compared_to_register_renaming.mdwn

3 years agoadd link to tomasulo_transformation for notes on "nameless" registers
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Luke Kenneth Casson Leighton [Tue, 27 Oct 2020 12:59:23 +0000 (12:59 +0000)]
add link to tomasulo_transformation for notes on "nameless" registers

3 years agoworking on compared_to_register_renaming.mdwn
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Jacob Lifshay [Tue, 27 Oct 2020 04:54:35 +0000 (21:54 -0700)]
working on compared_to_register_renaming.mdwn

3 years ago(no commit message)
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colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0 [Tue, 27 Oct 2020 02:45:52 +0000 (02:45 +0000)]

3 years ago(no commit message)
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lkcl [Tue, 27 Oct 2020 01:44:33 +0000 (01:44 +0000)]

3 years ago(no commit message)
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lkcl [Tue, 27 Oct 2020 01:42:35 +0000 (01:42 +0000)]

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lkcl [Mon, 26 Oct 2020 23:42:43 +0000 (23:42 +0000)]

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lkcl [Mon, 26 Oct 2020 23:41:48 +0000 (23:41 +0000)]

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lkcl [Mon, 26 Oct 2020 22:41:15 +0000 (22:41 +0000)]

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lkcl [Mon, 26 Oct 2020 21:27:11 +0000 (21:27 +0000)]

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lkcl [Mon, 26 Oct 2020 21:25:59 +0000 (21:25 +0000)]

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lkcl [Mon, 26 Oct 2020 21:25:25 +0000 (21:25 +0000)]

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lkcl [Mon, 26 Oct 2020 21:17:23 +0000 (21:17 +0000)]

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lkcl [Mon, 26 Oct 2020 21:16:47 +0000 (21:16 +0000)]

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lkcl [Mon, 26 Oct 2020 21:15:46 +0000 (21:15 +0000)]

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lkcl [Mon, 26 Oct 2020 21:15:09 +0000 (21:15 +0000)]

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lkcl [Mon, 26 Oct 2020 21:13:41 +0000 (21:13 +0000)]

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lkcl [Mon, 26 Oct 2020 21:09:34 +0000 (21:09 +0000)]

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lkcl [Mon, 26 Oct 2020 20:58:24 +0000 (20:58 +0000)]

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lkcl [Mon, 26 Oct 2020 20:57:55 +0000 (20:57 +0000)]

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lkcl [Mon, 26 Oct 2020 20:27:40 +0000 (20:27 +0000)]

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lkcl [Mon, 26 Oct 2020 20:18:19 +0000 (20:18 +0000)]

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lkcl [Mon, 26 Oct 2020 20:17:50 +0000 (20:17 +0000)]

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lkcl [Mon, 26 Oct 2020 17:29:54 +0000 (17:29 +0000)]

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lkcl [Mon, 26 Oct 2020 17:28:34 +0000 (17:28 +0000)]

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lkcl [Mon, 26 Oct 2020 17:23:35 +0000 (17:23 +0000)]

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lkcl [Mon, 26 Oct 2020 17:02:57 +0000 (17:02 +0000)]

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lkcl [Mon, 26 Oct 2020 17:01:54 +0000 (17:01 +0000)]

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lkcl [Mon, 26 Oct 2020 16:56:03 +0000 (16:56 +0000)]

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lkcl [Mon, 26 Oct 2020 16:48:30 +0000 (16:48 +0000)]

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lkcl [Mon, 26 Oct 2020 16:47:09 +0000 (16:47 +0000)]

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lkcl [Mon, 26 Oct 2020 16:46:20 +0000 (16:46 +0000)]

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lkcl [Mon, 26 Oct 2020 16:43:08 +0000 (16:43 +0000)]

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lkcl [Mon, 26 Oct 2020 16:27:36 +0000 (16:27 +0000)]

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lkcl [Mon, 26 Oct 2020 16:26:25 +0000 (16:26 +0000)]

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lkcl [Mon, 26 Oct 2020 10:58:08 +0000 (10:58 +0000)]

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lkcl [Mon, 26 Oct 2020 10:15:45 +0000 (10:15 +0000)]

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lkcl [Mon, 26 Oct 2020 10:00:28 +0000 (10:00 +0000)]

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lkcl [Mon, 26 Oct 2020 09:58:55 +0000 (09:58 +0000)]

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lkcl [Mon, 26 Oct 2020 09:58:27 +0000 (09:58 +0000)]

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