fix peripherals
authorNeel <neelgala@gmail.com>
Sat, 21 Jul 2018 07:16:22 +0000 (12:46 +0530)
committerNeel <neelgala@gmail.com>
Sat, 21 Jul 2018 07:16:22 +0000 (12:46 +0530)
src/bsv/bsv_lib/slow_peripherals_template.bsv
src/bsv/peripheral_gen.py
src/bsv/pinmux_generator.py

index 7247df8bcf7d8aac4f68720a97c994cdaf0b7cf5..17e724c10433a0a6fa13de6a583f42510e473a04 100644 (file)
@@ -39,8 +39,7 @@ package slow_peripherals;
        /*=====================================*/
        
        /*===== interface declaration =====*/
-       interface SP_ios;
-{1}
+       interface SP_dedicated_ios;
                `ifdef AXIEXP
                        interface Get#(Bit#(67)) axiexp1_out;
                        interface Put#(Bit#(67)) axiexp1_in;
@@ -48,7 +47,7 @@ package slow_peripherals;
        endinterface
        interface Ifc_slow_peripherals;
                interface AXI4_Slave_IFC#(`ADDR,`DATA,`USERSPACE) axi_slave;
-               interface SP_ios slow_ios;
+               interface SP_dedicated_ios slow_ios;
     method Action external_int(Bit#(32) in);
                `ifdef CLINT
                        method Bit#(1) msip_int;
@@ -57,6 +56,7 @@ package slow_peripherals;
                `endif
                `ifdef PLIC method ActionValue#(Tuple2#(Bool,Bool)) intrpt_note; `endif
     interface IOCellSide iocell_side; // mandatory interface
+{1}
        endinterface
        /*================================*/
 
@@ -271,7 +271,8 @@ package slow_peripherals;
                        end
         
                        `ifdef UART0 
-                               SyncBitIfc#(Bit#(1)) uart0_interrupt <-mkSyncBitToCC(uart_clock,uart_reset); 
+                               SyncBitIfc#(Bit#(1)) uart0_interrupt <-
+                                  mkSyncBitToCC(sp_clock, uart_reset); 
                                rule synchronize_the_uart0_interrupt;
                                        uart0_interrupt.send(uart0.irq);                
                                endrule
@@ -335,7 +336,7 @@ package slow_peripherals;
                `ifdef QSPI0 method     qspi0_isint=qspi0.interrupts[5]; `endif
                `ifdef QSPI1 method     qspi1_isint=qspi1.interrupts[5]; `endif
                `ifdef UART0 method uart0_intr=uart0.irq; `endif
-               interface SP_ios slow_ios;
+               interface SP_dedicated_ios slow_ios;
 /* template for dedicated peripherals
                        `ifdef UART0
                                interface uart0_coe=uart0.coe_rs232;
@@ -366,7 +367,7 @@ package slow_peripherals;
                endinterface
     // NEEL EDIT
     interface iocell_side=pinmux.iocell_side;
-    //interface pad_config0= gpioa.pad_config;
+    interface pad_config0= gpioa.pad_config;
     method Action external_int(Bit#(32) in);
       wr_interrupt<= in;
     endmethod
index 010a0faaec2df2ab1987b2683da270266d6670b1..6236649ee9e29126d3548df3355386da7901c0ca 100644 (file)
@@ -6,6 +6,12 @@ class PBase(object):
     def __init__(self, name):
         self.name = name
 
+    def slowifdeclmux(self):
+        return ''
+
+    def slowifdecl(self):
+        return ''
+
     def axibase(self, name, ifacenum):
         name = name.upper()
         return "%(name)s%(ifacenum)dBase" % locals()
@@ -152,7 +158,7 @@ class uart(PBase):
 
     def mkslow_peripheral(self, size=0):
         return "        Ifc_Uart_bs uart{0} <- \n" + \
-               "                mkUart_bs(clocked_by uart_clock,\n" + \
+               "                mkUart_bs(clocked_by sp_clock,\n" + \
                "                    reset_by uart_reset, sp_clock, sp_reset);"
 
     def _mk_connection(self, name=None, count=0):
@@ -179,7 +185,7 @@ class qquart(PBase):
 
     def mkslow_peripheral(self, size=0):
         return "        Uart16550_AXI4_Lite_Ifc uart{0} <- \n" + \
-               "                mkUart16550(clocked_by uart_clock,\n" + \
+               "                mkUart16550(clocked_by sp_clock,\n" + \
                "                    reset_by uart_reset, sp_clock, sp_reset);"
 
     def _mk_connection(self, name=None, count=0):
@@ -347,9 +353,9 @@ class gpio(PBase):
                "     import mux::*;\n" + \
                "     import gpio::*;\n"
 
-    def slowifdecl(self):
+    def slowifdeclmux(self):
         size = len(self.peripheral.pinspecs)
-        return "        interface GPIO_config#(%d) pad_config{0};" % size
+        return "    interface GPIO_config#(%d) pad_config{0};" % size
 
     def num_axi_regs32(self):
         return 2
@@ -363,7 +369,7 @@ class gpio(PBase):
         mname = mname.upper()
         print "AXIslavenum", name,  mname
         (ret, x) = PBase.axi_slave_idx(self, idx, name, ifacenum)
-        (ret2, x) = PBase.axi_slave_idx(self, idx, mname, ifacenum)
+        (ret2, x) = PBase.axi_slave_idx(self, idx+1, mname, ifacenum)
         return ("%s\n%s" % (ret, ret2), 2)
 
     def mkslow_peripheral(self, size=0):
@@ -466,7 +472,8 @@ class PeripheralIface(object):
         if slow:
             self.slow = slow(ifacename)
             self.slow.peripheral = self
-        for fname in ['slowimport', 'slowifdecl', 'mkslow_peripheral',
+        for fname in ['slowimport', 'slowifdecl', 'slowifdeclmux', 
+                      'mkslow_peripheral',
                       'mk_connection', 'mk_cellconn', 'mk_pincon']:
             fn = CallFn(self, fname)
             setattr(self, fname, types.MethodType(fn, self))
@@ -506,6 +513,13 @@ class PeripheralInterfaces(object):
             ret.append(self.data[name].slowimport())
         return '\n'.join(list(filter(None, ret)))
 
+    def slowifdeclmux(self, *args):
+        ret = []
+        for (name, count) in self.ifacecount:
+            for i in range(count):
+                ret.append(self.data[name].slowifdeclmux().format(i, name))
+        return '\n'.join(list(filter(None, ret)))
+
     def slowifdecl(self, *args):
         ret = []
         for (name, count) in self.ifacecount:
index 4f452edf72e59ebea0da3f27edf166e93bfa29ab..5e35df4cb7f7bb6b6e162d0121c27048c9c7ea8e 100644 (file)
@@ -110,7 +110,7 @@ def write_slow(slow, template, p, ifaces, iocells):
     with open(template) as bsv_file:
         template = bsv_file.read()
     imports = ifaces.slowimport()
-    ifdecl = ifaces.slowifdecl()
+    ifdecl = ifaces.slowifdeclmux()
     regdef = ifaces.axi_reg_def()
     slavedecl = ifaces.axi_slave_idx()
     fnaddrmap = ifaces.axi_addr_map()