3 #include "debug_module.h"
4 #include "debug_defines.h"
8 #include "debug_rom/debug_rom.h"
16 ///////////////////////// debug_module_data_t
18 debug_module_data_t::debug_module_data_t()
20 memset(data
, 0, sizeof(data
));
23 bool debug_module_data_t::load(reg_t addr
, size_t len
, uint8_t* bytes
)
25 if (addr
+ len
< sizeof(data
)) {
26 memcpy(bytes
, data
+ addr
, len
);
30 fprintf(stderr
, "ERROR: invalid load from debug_module_data_t: %zd bytes at 0x%016"
31 PRIx64
"\n", len
, addr
);
36 bool debug_module_data_t::store(reg_t addr
, size_t len
, const uint8_t* bytes
)
38 D(fprintf(stderr
, "debug_module_data_t store 0x%lx bytes at 0x%lx\n", len
,
41 if (addr
+ len
< sizeof(data
)) {
42 memcpy(data
+ addr
, bytes
, len
);
46 fprintf(stderr
, "ERROR: invalid store to debug_module_data_t: %zd bytes at 0x%016"
47 PRIx64
"\n", len
, addr
);
51 uint32_t debug_module_data_t::read32(reg_t addr
) const
53 assert(addr
+ 4 <= sizeof(data
));
55 (data
[addr
+ 1] << 8) |
56 (data
[addr
+ 2] << 16) |
57 (data
[addr
+ 3] << 24);
60 void debug_module_data_t::write32(reg_t addr
, uint32_t value
)
62 fprintf(stderr
, "debug_module_data_t::write32(0x%lx, 0x%x)\n", addr
, value
);
63 assert(addr
+ 4 <= sizeof(data
));
64 data
[addr
] = value
& 0xff;
65 data
[addr
+ 1] = (value
>> 8) & 0xff;
66 data
[addr
+ 2] = (value
>> 16) & 0xff;
67 data
[addr
+ 3] = (value
>> 24) & 0xff;
70 ///////////////////////// debug_module_t
72 debug_module_t::debug_module_t(sim_t
*sim
) : sim(sim
),
73 next_action(jal(ZERO
, 0)),
74 action_executed(false)
77 dmcontrol
.version
= 1;
79 for (unsigned i
= 0; i
< DEBUG_ROM_ENTRY_SIZE
/ 4; i
++) {
80 write32(debug_rom_entry
, i
, jal(ZERO
, 0));
84 memset(program_buffer
, 0, sizeof(program_buffer
));
87 void debug_module_t::reset()
89 for (unsigned i
= 0; i
< sim
->nprocs(); i
++) {
90 processor_t
*proc
= sim
->get_core(i
);
92 proc
->halt_request
= false;
96 dmcontrol
.authenticated
= 1;
97 dmcontrol
.version
= 1;
100 abstractcs
.datacount
= sizeof(dmdata
.data
) / 4;
103 void debug_module_t::add_device(bus_t
*bus
) {
104 bus
->add_device(DEBUG_START
, this);
105 bus
->add_device(DEBUG_EXCHANGE
, &dmdata
);
108 bool debug_module_t::load(reg_t addr
, size_t len
, uint8_t* bytes
)
110 addr
= DEBUG_START
+ addr
;
112 if (addr
>= DEBUG_ROM_ENTRY
&&
113 addr
< DEBUG_ROM_ENTRY
+ DEBUG_ROM_ENTRY_SIZE
) {
115 if (read32(debug_rom_entry
, dmcontrol
.hartsel
) == jal(ZERO
, 0)) {
116 // We're here in an infinite loop. That means that whatever abstract
117 // command has complete.
118 abstractcs
.busy
= false;
121 action_executed
= true;
123 halted
[(addr
- DEBUG_ROM_ENTRY
) / 4] = true;
124 memcpy(bytes
, debug_rom_entry
+ addr
- DEBUG_ROM_ENTRY
, len
);
128 if (action_executed
) {
129 // Restore the jump-to-self loop.
130 write32(debug_rom_entry
, dmcontrol
.hartsel
, next_action
);
131 next_action
= jal(ZERO
, 0);
132 action_executed
= false;
135 if (addr
>= DEBUG_ROM_CODE
&&
136 addr
< DEBUG_ROM_CODE
+ DEBUG_ROM_CODE_SIZE
) {
138 if (read32(debug_rom_code
, 0) == dret()) {
139 abstractcs
.busy
= false;
140 halted
[dmcontrol
.hartsel
] = false;
143 memcpy(bytes
, debug_rom_code
+ addr
- DEBUG_ROM_CODE
, len
);
147 if (addr
>= DEBUG_RAM_START
&& addr
< DEBUG_RAM_END
) {
148 memcpy(bytes
, program_buffer
+ addr
- DEBUG_RAM_START
, len
);
152 if (addr
>= DEBUG_ROM_EXCEPTION
&&
153 addr
< DEBUG_ROM_EXCEPTION
+ DEBUG_ROM_EXCEPTION_SIZE
) {
154 memcpy(bytes
, debug_rom_exception
+ addr
- DEBUG_ROM_EXCEPTION
, len
);
155 if (abstractcs
.cmderr
== abstractcs
.CMDERR_NONE
) {
156 abstractcs
.cmderr
= abstractcs
.CMDERR_EXCEPTION
;
161 fprintf(stderr
, "ERROR: invalid load from debug module: %zd bytes at 0x%016"
162 PRIx64
"\n", len
, addr
);
167 bool debug_module_t::store(reg_t addr
, size_t len
, const uint8_t* bytes
)
169 addr
= DEBUG_START
+ addr
;
171 if (addr
>= DEBUG_RAM_START
&& addr
< DEBUG_RAM_END
) {
172 memcpy(program_buffer
+ addr
- DEBUG_RAM_START
, bytes
, len
);
176 fprintf(stderr
, "ERROR: invalid store to debug module: %zd bytes at 0x%016"
177 PRIx64
"\n", len
, addr
);
181 void debug_module_t::write32(uint8_t *memory
, unsigned int index
, uint32_t value
)
183 uint8_t* base
= memory
+ index
* 4;
184 base
[0] = value
& 0xff;
185 base
[1] = (value
>> 8) & 0xff;
186 base
[2] = (value
>> 16) & 0xff;
187 base
[3] = (value
>> 24) & 0xff;
190 uint32_t debug_module_t::read32(uint8_t *memory
, unsigned int index
)
192 uint8_t* base
= memory
+ index
* 4;
193 uint32_t value
= ((uint32_t) base
[0]) |
194 (((uint32_t) base
[1]) << 8) |
195 (((uint32_t) base
[2]) << 16) |
196 (((uint32_t) base
[3]) << 24);
200 processor_t
*debug_module_t::current_proc() const
202 processor_t
*proc
= NULL
;
204 proc
= sim
->get_core(dmcontrol
.hartsel
);
205 } catch (const std::out_of_range
&) {
210 bool debug_module_t::dmi_read(unsigned address
, uint32_t *value
)
213 D(fprintf(stderr
, "dmi_read(0x%x) -> ", address
));
214 if (address
>= DMI_DATA0
&& address
< DMI_DATA0
+ abstractcs
.datacount
) {
215 unsigned i
= address
- DMI_DATA0
;
216 result
= dmdata
.read32(4 * i
);
218 if (abstractcs
.busy
&& abstractcs
.cmderr
== abstractcs
.CMDERR_NONE
) {
219 abstractcs
.cmderr
= abstractcs
.CMDERR_BUSY
;
222 bool autoexec
= false;
224 case 0: autoexec
= abstractcs
.autoexec0
; break;
225 case 1: autoexec
= abstractcs
.autoexec1
; break;
226 case 2: autoexec
= abstractcs
.autoexec2
; break;
227 case 3: autoexec
= abstractcs
.autoexec3
; break;
228 case 4: autoexec
= abstractcs
.autoexec4
; break;
229 case 5: autoexec
= abstractcs
.autoexec5
; break;
230 case 6: autoexec
= abstractcs
.autoexec6
; break;
231 case 7: autoexec
= abstractcs
.autoexec7
; break;
234 perform_abstract_command();
236 } else if (address
>= DMI_PROGBUF0
&& address
< DMI_PROGBUF0
+ progsize
) {
237 result
= read32(program_buffer
, address
- DMI_PROGBUF0
);
242 processor_t
*proc
= current_proc();
244 if (halted
[dmcontrol
.hartsel
]) {
245 dmcontrol
.hartstatus
= dmcontrol
.HARTSTATUS_HALTED
;
247 dmcontrol
.hartstatus
= dmcontrol
.HARTSTATUS_RUNNING
;
249 dmcontrol
.haltreq
= proc
->halt_request
;
251 dmcontrol
.hartstatus
= dmcontrol
.HARTSTATUS_NOTEXIST
;
253 result
= set_field(result
, DMI_DMCONTROL_HALTREQ
, dmcontrol
.haltreq
);
254 result
= set_field(result
, DMI_DMCONTROL_RESUMEREQ
, dmcontrol
.resumereq
);
255 result
= set_field(result
, DMI_DMCONTROL_HARTSTATUS
, dmcontrol
.hartstatus
);
256 result
= set_field(result
, DMI_DMCONTROL_HARTSEL
, dmcontrol
.hartsel
);
257 result
= set_field(result
, DMI_DMCONTROL_HARTRESET
, dmcontrol
.hartreset
);
258 result
= set_field(result
, DMI_DMCONTROL_DMACTIVE
, dmcontrol
.dmactive
);
259 result
= set_field(result
, DMI_DMCONTROL_RESET
, dmcontrol
.reset
);
260 result
= set_field(result
, DMI_DMCONTROL_AUTHENTICATED
, dmcontrol
.authenticated
);
261 result
= set_field(result
, DMI_DMCONTROL_AUTHBUSY
, dmcontrol
.authbusy
);
262 result
= set_field(result
, DMI_DMCONTROL_VERSION
, dmcontrol
.version
);
266 result
= set_field(result
, DMI_ABSTRACTCS_AUTOEXEC7
, abstractcs
.autoexec7
);
267 result
= set_field(result
, DMI_ABSTRACTCS_AUTOEXEC6
, abstractcs
.autoexec6
);
268 result
= set_field(result
, DMI_ABSTRACTCS_AUTOEXEC5
, abstractcs
.autoexec5
);
269 result
= set_field(result
, DMI_ABSTRACTCS_AUTOEXEC4
, abstractcs
.autoexec4
);
270 result
= set_field(result
, DMI_ABSTRACTCS_AUTOEXEC3
, abstractcs
.autoexec3
);
271 result
= set_field(result
, DMI_ABSTRACTCS_AUTOEXEC2
, abstractcs
.autoexec2
);
272 result
= set_field(result
, DMI_ABSTRACTCS_AUTOEXEC1
, abstractcs
.autoexec1
);
273 result
= set_field(result
, DMI_ABSTRACTCS_AUTOEXEC0
, abstractcs
.autoexec0
);
274 result
= set_field(result
, DMI_ABSTRACTCS_CMDERR
, abstractcs
.cmderr
);
275 result
= set_field(result
, DMI_ABSTRACTCS_BUSY
, abstractcs
.busy
);
276 result
= set_field(result
, DMI_ABSTRACTCS_DATACOUNT
, abstractcs
.datacount
);
279 result
= progsize
<< DMI_PROGBUFCS_PROGSIZE_OFFSET
;
285 D(fprintf(stderr
, "error\n"));
289 D(fprintf(stderr
, "0x%x\n", result
));
294 bool debug_module_t::perform_abstract_command()
296 if (abstractcs
.cmderr
!= abstractcs
.CMDERR_NONE
)
298 if (abstractcs
.busy
) {
299 abstractcs
.cmderr
= abstractcs
.CMDERR_BUSY
;
303 if ((command
>> 24) == 0) {
305 unsigned size
= get_field(command
, AC_ACCESS_REGISTER_SIZE
);
306 bool write
= get_field(command
, AC_ACCESS_REGISTER_WRITE
);
307 unsigned regno
= get_field(command
, AC_ACCESS_REGISTER_REGNO
);
309 if (regno
< 0x1000 || regno
>= 0x1020) {
310 abstractcs
.cmderr
= abstractcs
.CMDERR_NOTSUP
;
314 unsigned regnum
= regno
- 0x1000;
316 if (!halted
[dmcontrol
.hartsel
]) {
317 abstractcs
.cmderr
= abstractcs
.CMDERR_HALTRESUME
;
324 write32(debug_rom_code
, 0, lw(regnum
, ZERO
, DEBUG_EXCHANGE
));
326 write32(debug_rom_code
, 0, sw(regnum
, ZERO
, DEBUG_EXCHANGE
));
330 write32(debug_rom_code
, 0, ld(regnum
, ZERO
, DEBUG_EXCHANGE
));
332 write32(debug_rom_code
, 0, sd(regnum
, ZERO
, DEBUG_EXCHANGE
));
337 write32(debug_rom_code, 0, lq(regnum, ZERO, DEBUG_EXCHANGE));
339 write32(debug_rom_code, 0, sq(regnum, ZERO, DEBUG_EXCHANGE));
343 abstractcs
.cmderr
= abstractcs
.CMDERR_NOTSUP
;
346 if (get_field(command
, AC_ACCESS_REGISTER_POSTEXEC
)) {
347 write32(debug_rom_code
, 1, jal(ZERO
, DEBUG_RAM_START
- DEBUG_ROM_CODE
- 4));
349 write32(debug_rom_code
, 1, ebreak());
352 if (get_field(command
, AC_ACCESS_REGISTER_PREEXEC
)) {
353 write32(debug_rom_entry
, dmcontrol
.hartsel
,
354 jal(ZERO
, DEBUG_RAM_START
- (DEBUG_ROM_ENTRY
+ 4 * dmcontrol
.hartsel
)));
356 jal(ZERO
, DEBUG_ROM_CODE
- (DEBUG_ROM_ENTRY
+ 4 * dmcontrol
.hartsel
));
358 write32(debug_rom_entry
, dmcontrol
.hartsel
,
359 jal(ZERO
, DEBUG_ROM_CODE
- (DEBUG_ROM_ENTRY
+ 4 * dmcontrol
.hartsel
)));
362 write32(debug_rom_exception
, dmcontrol
.hartsel
,
363 jal(ZERO
, (DEBUG_ROM_ENTRY
+ 4 * dmcontrol
.hartsel
) - DEBUG_ROM_EXCEPTION
));
364 abstractcs
.busy
= true;
366 abstractcs
.cmderr
= abstractcs
.CMDERR_NOTSUP
;
371 bool debug_module_t::dmi_write(unsigned address
, uint32_t value
)
373 D(fprintf(stderr
, "dmi_write(0x%x, 0x%x)\n", address
, value
));
374 if (address
>= DMI_DATA0
&& address
< DMI_DATA0
+ abstractcs
.datacount
) {
375 unsigned i
= address
- DMI_DATA0
;
376 dmdata
.write32(4 * i
, value
);
378 if (abstractcs
.busy
&& abstractcs
.cmderr
== abstractcs
.CMDERR_NONE
) {
379 abstractcs
.cmderr
= abstractcs
.CMDERR_BUSY
;
382 bool autoexec
= false;
384 case 0: autoexec
= abstractcs
.autoexec0
; break;
385 case 1: autoexec
= abstractcs
.autoexec1
; break;
386 case 2: autoexec
= abstractcs
.autoexec2
; break;
387 case 3: autoexec
= abstractcs
.autoexec3
; break;
388 case 4: autoexec
= abstractcs
.autoexec4
; break;
389 case 5: autoexec
= abstractcs
.autoexec5
; break;
390 case 6: autoexec
= abstractcs
.autoexec6
; break;
391 case 7: autoexec
= abstractcs
.autoexec7
; break;
394 perform_abstract_command();
398 } else if (address
>= DMI_PROGBUF0
&& address
< DMI_PROGBUF0
+ progsize
) {
399 write32(program_buffer
, address
- DMI_PROGBUF0
, value
);
405 dmcontrol
.dmactive
= get_field(value
, DMI_DMCONTROL_DMACTIVE
);
406 if (dmcontrol
.dmactive
) {
407 dmcontrol
.haltreq
= get_field(value
, DMI_DMCONTROL_HALTREQ
);
408 dmcontrol
.resumereq
= get_field(value
, DMI_DMCONTROL_RESUMEREQ
);
409 dmcontrol
.reset
= get_field(value
, DMI_DMCONTROL_RESET
);
410 dmcontrol
.hartsel
= get_field(value
, DMI_DMCONTROL_HARTSEL
);
414 processor_t
*proc
= current_proc();
416 proc
->halt_request
= dmcontrol
.haltreq
;
417 if (dmcontrol
.resumereq
) {
418 write32(debug_rom_code
, 0, dret());
419 write32(debug_rom_entry
, dmcontrol
.hartsel
,
420 jal(ZERO
, DEBUG_ROM_CODE
- (DEBUG_ROM_ENTRY
+ 4 * dmcontrol
.hartsel
)));
421 abstractcs
.busy
= true;
429 return perform_abstract_command();
432 abstractcs
.autoexec7
= get_field(value
, DMI_ABSTRACTCS_AUTOEXEC7
);
433 abstractcs
.autoexec6
= get_field(value
, DMI_ABSTRACTCS_AUTOEXEC6
);
434 abstractcs
.autoexec5
= get_field(value
, DMI_ABSTRACTCS_AUTOEXEC5
);
435 abstractcs
.autoexec4
= get_field(value
, DMI_ABSTRACTCS_AUTOEXEC4
);
436 abstractcs
.autoexec3
= get_field(value
, DMI_ABSTRACTCS_AUTOEXEC3
);
437 abstractcs
.autoexec2
= get_field(value
, DMI_ABSTRACTCS_AUTOEXEC2
);
438 abstractcs
.autoexec1
= get_field(value
, DMI_ABSTRACTCS_AUTOEXEC1
);
439 abstractcs
.autoexec0
= get_field(value
, DMI_ABSTRACTCS_AUTOEXEC0
);
440 if (get_field(value
, DMI_ABSTRACTCS_CMDERR
) == abstractcs
.CMDERR_NONE
) {
441 abstractcs
.cmderr
= abstractcs
.CMDERR_NONE
;