riscv/processor.h

   1 #ifndef _RISCV_PROCESSOR_H
   2 #define _RISCV_PROCESSOR_H
   3
   4 #include "decode.h"
   5 #include <cstring>
   6 #include "trap.h"
   7 #include "mmu.h"
   8
   9 #define MAX_UTS 32
  10
  11 class sim_t;
  12
  13 class processor_t
  14 {
  15 public:
  16   processor_t(sim_t* _sim, char* _mem, size_t _memsz);
  17   void init(uint32_t _id, char* _mem, size_t _memsz);
  18   void step(size_t n, bool noisy);
  19
  20 private:
  21   sim_t* sim;
  22
  23   // architected state
  24   reg_t XPR[NXPR];
  25   freg_t FPR[NFPR];
  26
  27   // privileged control registers
  28   reg_t pc;
  29   reg_t epc;
  30   reg_t badvaddr;
  31   reg_t cause;
  32   reg_t evec;
  33   reg_t tohost;
  34   reg_t fromhost;
  35   reg_t pcr_k0;
  36   reg_t pcr_k1;
  37   uint32_t id;
  38   uint32_t sr;
  39   uint32_t count;
  40   uint32_t compare;
  41
  42   // unprivileged control registers
  43   uint32_t fsr;
  44
  45   // # of bits in an XPR (32 or 64). (redundant with sr)
  46   int xprlen;
  47
  48   // shared memory
  49   mmu_t mmu;
  50
  51   // counters
  52   reg_t counters[32];
  53
  54   // functions
  55   void set_sr(uint32_t val);
  56   void set_fsr(uint32_t val);
  57   void take_trap(trap_t t, bool noisy);
  58   void disasm(insn_t insn, reg_t pc);
  59
  60   // vector stuff
  61   void vcfg();
  62   void setvl(int vlapp);
  63
  64   bool utmode;
  65   int utidx;
  66   int vlmax;
  67   int vl;
  68   int nxpr_all;
  69   int nfpr_all;
  70   int nxpr_use;
  71   int nfpr_use;
  72   processor_t* uts[MAX_UTS];
  73
  74   friend class sim_t;
  75 };
  76
  77 #endif