Zero-extend flw, fmv_s_x instructions
[riscv-isa-sim.git] / riscv / insns / fmv_s_x.h
index f0f95aca06b7bea9b73032c7a8c9f6dbe273c08f..2daf6dabe06be573999a3f1abf6012de47904102 100644 (file)
@@ -1,3 +1,3 @@
 require_extension('F');
 require_fp;
-WRITE_FRD(RS1);
+WRITE_FRD(zext32(RS1));