* Fix misa losing its value in processor constructor due to state:reset() following state.misa initialization.
Make state:reset() preserve misa.
* Set state.misa to max_isa on reset().
* Idiomatic fix for earlier commit.
+void state_t::reset(reg_t max_isa)
{
memset(this, 0, sizeof(*this));
{
memset(this, 0, sizeof(*this));
prv = PRV_M;
pc = DEFAULT_RSTVEC;
load_reservation = -1;
prv = PRV_M;
pc = DEFAULT_RSTVEC;
load_reservation = -1;
void processor_t::reset()
{
void processor_t::reset()
{
state.dcsr.halt = halt_on_reset;
halt_on_reset = false;
set_csr(CSR_MSTATUS, state.mstatus);
state.dcsr.halt = halt_on_reset;
halt_on_reset = false;
set_csr(CSR_MSTATUS, state.mstatus);
// architectural state of a RISC-V hart
struct state_t
{
// architectural state of a RISC-V hart
struct state_t
{
+ void reset(reg_t max_isa);
static const int num_triggers = 4;
static const int num_triggers = 4;